Optimum write-back strategy for directory-based cache coherence

Details Optimum write-back strategy for directory-based cache coherence Optimum write-back strategy for directory-based cache coherence

1991-05-23

1994-05-17

Robertson, David L.

Boots, shoes, and leggings

364DIG1, 36424341, G06F 1200

Patent

active

053136098

ABSTRACT:
A directory-based protocol is provided for maintaining data coherency in a multiprocessing (MP) system having a number of processors with associated write-back caches, a multistage interconnection network (MIN) leading to a shared memory, and a global directory associated with the main memory to keep track of state and control information of cache lines. Upon a request by a requesting cache for a cache line which has been exclusively modified by a source cache, two buffers are situated in the global directory to collectively intercept modified data words of the modified cache line during the write-back to memory. A modified word buffer is used to capture modified words within the modified cache line. Moreover, a line buffer stores an old cache line transferred from the memory, during the write back operation. Finally, the line buffer and the modified word buffer, together, provide the entire modified line to a requesting cache.

REFERENCES:
patent: 4426681 (1984-01-01), Bacot et al.
patent: 4445174 (1984-04-01), Fletcher
patent: 4471429 (1984-09-01), Porter et al.
patent: 4484267 (1984-11-01), Fletcher
patent: 4622631 (1986-11-01), Frank et al.
patent: 4747043 (1988-05-01), Rodman
patent: 4755930 (1988-07-01), Wilson, Jr. et al.
patent: 4768148 (1988-08-01), Keeley et al.
patent: 4785395 (1988-11-01), Keeley
patent: 4847804 (1989-07-01), Shaffer et al.
patent: 5119485 (1992-06-01), Ledbetter, Jr. et al.
E. V. Toney, "Compact Global Table For Management Of Multiple Caches," IBM Technical Disclosure Bulletin, vol. 32, No. 7, pp. 322-324, Dec., 1989.
C. K. Tang, "Cache system design in the tightly coupled multiprocessor system," National Computer Conference, pp. 749-753, Endicott, New York, 1976.
W. C. Yen, D. W. L. Yen and K. Fu, "Data Coherence Problem in a Multicache System," IEEE Transactions on Computers, vol. c-34, No. 1, pp. 56-65, Jan., 1985.
R. N. Rechtaschaffen and R. J. Sparacio, "Improved Sharing Of Modified Lines In Tightly-Coupled Multiprocessor Configurations," IBM Technical Disclosure Bulletin, vol. 30, No. 9, p. 434, Feb., 1988.
Agarwal, et al., "An Evaluation of Directory Schemes for Cache Coherence," IEEE, pp. 280-289, Sanford University, California, 1988.
L. M. Censier and P. Featurier, "A New Solution to Coherence Problems in Multicache Systems," IEEE Transactions on Computers, vol. c-27, No. 12, pp. 1112-1118, Dec., 1978.
M. Dubois and F. A. Briggs, "Effects of Cache Coherency in Multiprocessors," IEEE Transactions on Computers, vol. c-31, No. 11, Nov., 1982.

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