Optimum phase timing recovery in the presence of strong...

Pulse or digital communications – Receivers – Interference or noise reduction

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C375S355000

Reexamination Certificate

active

07489749

ABSTRACT:
A data communication device with a receiver for receiving and processing incoming signal having intersymbol interference component to produce resultant signals with less interference. The processor includes a timing recovery processor for recovering a clock signal from the sample streams of the incoming signal. The recovered clock signal is also suitable for signal detection of the incoming signals under strong intersymbol interference.

REFERENCES:
patent: 4607230 (1986-08-01), Kaku et al.
patent: 5703905 (1997-12-01), Langberg
patent: 6055119 (2000-04-01), Lee
patent: 6175599 (2001-01-01), Lyon et al.
patent: 6212144 (2001-04-01), Asano
patent: 6246444 (2001-06-01), Kim
patent: 6285726 (2001-09-01), Gaudet
patent: 6363129 (2002-03-01), Agazzi
patent: 6522489 (2003-02-01), Nagaraj
patent: 6577689 (2003-06-01), Smith et al.
patent: 6650617 (2003-11-01), Belotserkovsky et al.
patent: 6819514 (2004-11-01), Behrens et al.
patent: 6856655 (2005-02-01), Garcia
patent: 6947512 (2005-09-01), Shinoda et al.
patent: 6952444 (2005-10-01), Segal et al.
patent: 6985548 (2006-01-01), Jabbar et al.
patent: 2002/0097823 (2002-07-01), Kobayashi et al.
patent: 2003/0142687 (2003-07-01), Lin
patent: 2004/0196938 (2004-10-01), Long et al.
patent: 2004/0223567 (2004-11-01), Liu
patent: 2005/0185742 (2005-08-01), Liu
patent: WO01/91361 (2001-11-01), None
Mueller et al (“Timing Recovery in Digital Synchronous Data Receivers” IEEE Transactions on Communications, IEEE Inc. New York, US, vol. 24, No. 5, May 1, 1976, pp. 516-531).
International Search Report dated Jun. 8, 2005 for corresponding Application No. PCT/US2005/005959.
Mueller K.H. et al. “Timing Recovery in Digital Synchronous Data Receiver” IEEE Transactions on Communications. vol. 24, No. 5, May 1, 1976 pp. 516-531.
A. Nayak; J.R. Barry; S.W. McLaughlin: “Iterative Timing Recovery and Turbo Equalization”, 3rdInternational Sumposium on Turbo Codes, “Online” Sep. 1, 2003—Sep. 5, 2003. XP002328648. Brest, France.
Zhu Quanqing: Zou Xuecheng; Shen Xubang: “Desing and Implementation of a clock recovery circuit for fast Ethernet applications”. Journal of Systems Engineering and Electronics, vol. 15, No. 4, 2004, pp. 507-510. XP009047720. China Ocean Press Beijing.
K. H. Mueller and M. Muller, “Timing Recovery in Digital Synchronous Data Receivers,” IEEE Transactions on Communications, pp. 516-531, vol. com-24, No. 5, May 1976.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Optimum phase timing recovery in the presence of strong... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Optimum phase timing recovery in the presence of strong..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Optimum phase timing recovery in the presence of strong... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4093957

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.