Optimizing speed and charge injection parameters of a switched c

Details Optimizing speed and charge injection parameters of a switched c Optimizing speed and charge injection parameters of a switched c

1990-08-29

1992-07-14

LaRoche, Eugene R.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307353, 307491, 307572, 307246, H03K 5159, G06G 712

Patent

active

051305712

ABSTRACT:
A switched capacitor circuit that uses more than one switch in parallel. The control signals of each switch are turned off in sequence, giving an induced offset voltage in the final case due only to the last turned off switch, but with a capacitor charge or acquisition time due to the parallel combinations of all of the switches. An alternative switch capacitor circuit uses a bootstrapped gatedrive control signal. The gatedrive control signal initially assumes a high value resulting in a low switch resistance and, thus, a fast capacitor charge or acquisition time followed by a reduction in voltage to the normal "digital" level until turn off. The resultant induced offset voltage is the same as that due to a simple minimum sized switch.

REFERENCES:
patent: 4308468 (1981-12-01), Olson

Affiliated with

Also associated with

Rating

Optimizing speed and charge injection parameters of a switched c does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Optimizing speed and charge injection parameters of a switched c, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Optimizing speed and charge injection parameters of a switched c will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-336773