Optimizing compiler for generating store instructions having...

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

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Details

C711S120000, C711S122000

Reexamination Certificate

active

06249911

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to data processing in general, and in particular to a software compiler. Still more particularly, the present invention relates to an optimizing compiler for generating STORE instructions having memory hierarchy control bits.
2. Description of the Prior Art
Compilers are software that convert source code written in a high-level programming language, such as C or C++, to object code that can be executed by a processor within a data processing system. In other words, a compiler translates high-level instructions into low-level machine code that can be read and understood by the processor. In addition to converting source code to object code, most modern compilers are also capable of optimizing individual instructions in order to increase the performance of the executable code. This optimization is performed in several discrete steps. Optimization begins with various high-level optimization steps performed at a procedural level by a code optimizer. Such high-level optimization steps include so-called procedure inlining, loop transformations, and global restructuring and analysis. The remaining optimization steps form the “back end” of the code optimizer.
Most multiprocessor data processing systems typically include a multi-level memory hierarchy. However, instructions generated by prior art compilers are not optimized to take advantage of the multi-level memory hierarchy. The present disclosure details an optimizing compiler that is capable of generating STORE instructions having memory hierarchy control bits for updating data within a multi-level memory hierarchy of a multiprocessor data processing system.
SUMMARY OF THE INVENTION
In accordance with a preferred embodiment of the present invention, a compiler first converts a first STORE instruction to a second STORE instruction. The compiler then provides an operation code field within the second instruction for indicating an updating operation. The compiler further provides a vertical write-through level field within the second instruction for indicating a vertical memory level and a horizontal memory level within a multi-level memory hierarchy to which the updating operation should be applied.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.


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