Optimizing code motion with delayed exception handling

Details Optimizing code motion with delayed exception handling Optimizing code motion with delayed exception handling

2011-04-19

2011-04-19

Ho, Andy (Department: 2194)

Electrical computers and digital processing systems: interprogra

Dynamic linking, late binding

C717S151000

Reexamination Certificate

active

07930707

ABSTRACT:
Systems, methods, media, and other embodiments associated with optimizing code motion with delayed exception handling are described. One exemplary system embodiment includes a data store to store information about a relocated instruction, a relocation logic to relocate instructions, and a run-time logic to detect exceptions raised by executed instructions. The run-time logic may selectively delay handling exceptions based on whether an executed instruction is a relocated instruction.

REFERENCES:
patent: 5278985 (1994-01-01), Odnert et al.
patent: 5778211 (1998-07-01), Hohensee et al.
patent: 6871173 (2005-03-01), Brauch
patent: 7051340 (2006-05-01), Fisher et al.
patent: 7516453 (2009-04-01), Bugnion
patent: 2002/0092002 (2002-07-01), Babaian et al.
patent: 2003/0101431 (2003-05-01), Duesterwald et al.
patent: 2007/0214342 (2007-09-01), Newburn et al.
“Partial Redundancy Elimination” by Max Hailperin, Jan. 23, 2005.

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