Optimized write protocol for memory accesses utilizing row and c

Details Optimized write protocol for memory accesses utilizing row and c Optimized write protocol for memory accesses utilizing row and c

1993-02-16

1994-04-05

Dixon, Joseph L.

Boots, shoes, and leggings

364DIG1, 36424341, G06F 1208

Patent

active

053012992

ABSTRACT:
An improved method for accessing memory in a computer system using standard fast paged mode memory access for a second memory access where the second memory access is pending at the completion of a first memory access. However, if at the completion of a first memory access there is no pending memory request, the RAS line of the memory is deactivated allowing precharge during an idle state on the bus.

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