Optimized thin film metal interconnects in integrated circuit st

Details Optimized thin film metal interconnects in integrated circuit st Optimized thin film metal interconnects in integrated circuit st

1992-06-01

1993-11-02

Ryan, Patrick J.

Stock material or miscellaneous articles

Structurally defined web or sheet

Discontinuous or differential coating, impregnation or bond

428901, 428195, B32B 900

Patent

active

052582191

ABSTRACT:
Thin film metal interconnects employed in integrated circuit structures have a width, L, and a spatial separation or spacing, S, according to the following characteristics: interconnect width, L.gtoreq.0.1 .mu.m; interconnect spatial separation, S.gtoreq.0.2 .mu.m, interconnect thickness, T.sub.A1 .ltoreq.2L .mu.m; and interlayer insulating film thickness, T.sub.I .ltoreq.2L .mu.m. More particularly, the layout is characterized by having the ranges of 0.1.ltoreq.L.ltoreq.0.8 .mu.m and 0.2 .mu.m.ltoreq.S.ltoreq.1 .mu.m. As a result, IC signal switching speed is optimized for IC's designed in the submicron integration scale regime.

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