Optimized multi-mode DFT implementation

Details Optimized multi-mode DFT implementation Optimized multi-mode DFT implementation

2011-08-30

2011-08-30

Malzahn, David H (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

08010588

ABSTRACT:
The present invention relates to a method and apparatus for implementing a discrete Fourier transformation (DFT) of a predetermined vector size, wherein at least one enhanced DFT module is provided by using at least one type of DFT module including multiplication by first and second types of twiddle factors in respective different multiplication stages separated by an intermediate integration stage, and generating the enhanced DFT module by combining the at least one type of DFT module with a recursive stage configured to multiply by a third type of twiddle factor and to selectively switch between a bypass function and a butterfly function in said recursive stage. Thereby, an implementation of non 2x-radix Fourier transformation can be achieved with moderate hardware complexity.

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