Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Reexamination Certificate
2011-01-11
2011-01-11
Purvis, Sue (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
C257SE27067, C257SE29019
Reexamination Certificate
active
07868423
ABSTRACT:
A structure for a semiconductor device includes an isolated MOSFET (e.g., NFET) having triple-well technology adjacent to an isolated PFET which itself is adjacent to an isolated NFET. The structure includes a substrate in which is formed a deep n-band region underneath any n-wells, p-wells and p-band regions within the substrate. One p-band region is formed above the deep n-band region and underneath the isolated p-well for the isolated MOSFET, while another p-band region is formed above the deep n-band region and underneath all of the p-wells and n-wells, including those that are part of the isolated PFET and NFET devices within the substrate. The n-wells for the isolated MOSFET are connected to the deep n-band region. The resulting structure provides for improved device isolation and reduction of noise propagating from the substrate to the FETs while maintaining the standard CMOS spacing layout spacing rules and electrical biasing characteristics both external and internal to the triple-well isolation regions.
REFERENCES:
patent: 6097068 (2000-08-01), Brown et al.
patent: 6288424 (2001-09-01), Ludikhuize
patent: 6387744 (2002-05-01), Taniguchi et al.
patent: 6396109 (2002-05-01), Hutter et al.
patent: 6627937 (2003-09-01), Shinkawata
patent: 6969901 (2005-11-01), Pan et al.
patent: 7161213 (2007-01-01), Ito et al.
patent: 7462530 (2008-12-01), Rittaku
patent: 2006/0102961 (2006-05-01), Ohkubo et al.
patent: 2006/0133189 (2006-06-01), Sung et al.
patent: 2007/0170515 (2007-07-01), Collins et al.
Izahan Syemylona Ishak et al., RF Substrate Noise Characterization for CMO 0.18 μm; 2004 RF and Microwave Conference, Oct. 5-6, 2004, Subang, Selangor, Malaysia, 2004 Copyright IEEE.
Benoit John J.
Collins David S.
Feilchenfeld Natalie B.
Gautsch Michael L.
Liu Xuefeng
Cantor & Colburn LLP
International Business Machines - Corporation
Kotulak Richard
Purvis Sue
Sandvik Benjamin P
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