Optimized buffer loading for packet header processing

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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C370S395500

Reexamination Certificate

active

08085780

ABSTRACT:
A packet header processing engine includes a level2(L2) header generation unit and a level3(L3) header generation unit. The L2and L3header generation units are implemented in parallel with one another. The L2generation unit writes L2header information to a first buffer and the L3generation unit writes L3header information to a second buffer. When the L2and L3header generation units finish processing a packet, the packet may be unloaded from the first and second buffer while a new packet is simultaneously loaded to the packet header processing engine.

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