Optimized binary adder and comparator having an implicit constan

Details Optimized binary adder and comparator having an implicit constan Optimized binary adder and comparator having an implicit constan

1994-03-11

1995-02-28

Mai, Tan V.

Boots, shoes, and leggings

3401462, G06F 750, G06F 702

Patent

active

053943511

ABSTRACT:
A three-input comparator, where one of the inputs is an implicit constant, is formed with a special carry-save adder (CSA) followed by carry propagation circuitry. The special CSA uses two different bit cells depending upon whether that bit position in the constant input is a one or a zero. The three-input comparator can be modified to be a three-input adder by using a full carry-propagate adder (CPA). By taking into account a priori restrictions on the possible input operands, these arithmetic circuits are smaller and more efficient than conventional adders and comparators, which must be designed to deal with all possible input operands.

REFERENCES:
patent: 4695971 (1987-09-01), Reimann
patent: 4783757 (1988-11-01), Krauskopf
patent: 4918636 (1990-04-01), Iwata et al.
patent: 5319347 (1994-06-01), McClure

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