Optimization of adder based circuit architecture

Details Optimization of adder based circuit architecture Optimization of adder based circuit architecture

2005-08-23

2005-08-23

Malzahn, D. H. (Department: 2124)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

06934733

ABSTRACT:
An adder based circuit embodied in an integrated circuit includes an input module, a carry module and an output module. The carry module has a minimum depth defined by a recursive expansion of at least one function associated with the carry module based on a variable k derived from a Fibonacci series. Invertor, XOR, XNOR (more preferably, OR(NOT(a),b)) and multiplexer elements are selectively coupled to the input and output modules to configure the adder based circuit as a subtractor, adder-subtractor, incrementor, decrementor, incrementer-decrementor or absolute value calculator. A computer process of designing the adder base circuit recursively expands the functions, and optimization of death, fanout and distribution of negations is performed.

REFERENCES:
patent: 4159529 (1979-06-01), Stakhov
patent: 4276608 (1981-06-01), Stakhov et al.

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