Optimal test generation for finite state machine models

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371 151, G06F 1100

Patent

active

049911767

ABSTRACT:
Faster, yet, completely efficient and exhaustive testing is afforded an entity (e.g., protocol, VLSI circuit, software application) represented as finite state machines by employing the present method in which test sequences are generated according to minimum cost function rules. Minimum cost unique signatures are developed for state identification of the finite state machine. Based upon the minimum cost unique signatures, a minimum cost test sequence is generated to cover every state transition of the finite state machine. As a result, every testable aspect of the entity is guaranteed to be tested using a minimum number of steps which represents a considerable cost savings.

REFERENCES:
patent: 4692921 (1987-09-01), Dahbura et al.
patent: 4696006 (1987-09-01), Kawai
patent: 4748626 (1988-05-01), Wong
J. P. Roth, "Improved Test-Generating D-Algorithm", IBMTDB, vol. 20, No. 9, Feb. 1978, pp. 3792-3794.

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