Optimal redundant arithmetic for microprocessors design

Details Optimal redundant arithmetic for microprocessors design Optimal redundant arithmetic for microprocessors design

2005-01-25

2005-01-25

Tsai, Henry W. H. (Department: 2183)

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

C712S221000

Reexamination Certificate

active

06848043

ABSTRACT:
Methods and apparatus for improving system performance using redundant arithmetic are disclosed. In one embodiment, one or more dependency chains are formed. A dependency chain may comprise of two or more instructions. A first instruction may generate a result in a redundant form. A second instruction may accept the result from the first instruction as a first input operand. The instructions in the dependency chain may execute separately from instructions not in the dependency chain.

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