Optimal PWA high density routing to minimize EMI substrate coupl

Details Optimal PWA high density routing to minimize EMI substrate coupl Optimal PWA high density routing to minimize EMI substrate coupl

1996-11-21

1999-09-21

Sough, Hyung-Sub

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

174250, 174255, 257698, 257700, 257776, 361794, 361777, H05K 900, H05K 111

Patent

active

059557044

ABSTRACT:
A computer system includes a multi-layer circuit board having first and second routing layers. A component including pads is mounted on the first layer. Crosstalk protection is provided by a plurality of ground vias and signal vias adjacent to the component and extending between the first and second layers. A first circuit trace extends from a first pad along the first layer and between two adjacent ones of the ground vias. A second circuit trace extends from a second pad along the first layer to a signal via at the first layer and from the signal via along the second layer between the two adjacent ground vias.

REFERENCES:
patent: 4153988 (1979-05-01), Doo
patent: 4881116 (1989-11-01), Hidada et al.
patent: 5424492 (1995-06-01), Petty et al.
1995 IEEE International Symposium On Electromagnetic Compatibility, Aug. 14-18, 1995.

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