Computer graphics processing and selective visual display system – Computer graphics processing – Character generating
Reexamination Certificate
2007-05-29
2007-05-29
Tung, Kee M. (Department: 2628)
Computer graphics processing and selective visual display system
Computer graphics processing
Character generating
C345S441000
Reexamination Certificate
active
09244270
ABSTRACT:
A frame buffer is divided into tiles of, for example, 32 by 32 pixels. Triangles (and portions thereof) that are within a given tile are rasterized one triangle at a time into the tile location. This process repeats for each tile in the image frame. A sorting circuit generates control bits representing a vertical order of the vertices of a current triangle. A series of multiplexers vertically sorts the vertices bases on these control bits. A region calculation circuit generates region bits representing a location each of the vertices with respect to the current tile. A trivial discard of the triangle data occurs if the region bits indicate that the entire triangle lies outside of the tile. Subsequently, an initial rasterization starting point is estimated based on the region bits to lower the time needed for the rasterizer to find the first pixel of the current triangle to be assigned values.
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Battle James T.
Yue Lordson L.
ATI International SRL
Lay Michelle K.
Tung Kee M.
Vedder Price Kaufman & Kammholz P.C.
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