Optimal delay controller

Details Optimal delay controller Optimal delay controller

1999-05-07

2000-10-24

Nuton, My-Trang

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

327160, H03H 1126

Patent

active

061373338

ABSTRACT:
A first detection circuit, a second detection circuit and a counter circuit. The first detection circuit may be configured to present a first control signal in response to (i) an input signal having a period, (ii) an output signal and (iii) an enable signal. The second detection circuit may be configured to present a second control signal in response to (i) the input signal, (ii) the output signal and (iii) the enable signal. The counter circuit may be configured to present a delay signal in response to (i) the first control signal, (ii) the second control signal and (iii) the output signal. The delay signal may be a fraction of the period of the input signal.

REFERENCES:
patent: 4959617 (1990-09-01), Martin
patent: 5229843 (1993-07-01), Dorsman
patent: 5834950 (1998-11-01), Co et al.
patent: 5926041 (1999-07-01), Duffy et al.
9601/DM9601 Retriggerable One Shot, National Semiconductor Corporation, Jun. 1989, pp. 1-6.
Obsolete Product Possible Substitute Product ICM7555, (CA555, CA555C, LM555C), Harris Semiconductor, Dec. 1999, File No. 834.6, pp. 1-6.
Timothy Williams et al., U.S.S.N. 09/231,211, Filed Jan. 14, 1999, Entitled "Self-Adjusted Optimal Delay Time Filter".

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