Optical self-routing scheme with low optical loss and...

Details Optical self-routing scheme with low optical loss and... Optical self-routing scheme with low optical loss and...

2000-01-28

2003-04-08

Negash, Kinfe-Michael (Department: 2633)

Optical: systems and elements

Deflection using a moving element

Using a periodically moving element

C359S199200, C359S108000

Reexamination Certificate

active

06545786

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a routing address encoder, a routing controller, and a routing switch, which decrease the number and the length of optical splitting and optical delay line at optical routing circuits in optical communication network. Therefore, optical loss is reduced and miniaturization of the devices is accomplished.
BACKGROUND OF THE INVENTION
FIGS. 1A and 1B
are block diagrams for illustrating a conventional address encoder and a conventional address decoder for optical routing circuit.
FIG. 1A
illustrates a routing address encoder at transmission part and
FIG. 1B
illustrates a routing address decoder at receiving part.
The routing address decoder includes a pulse generator
10
, an external modulator
11
, optical splitters
12
and
13
, and an optical delay line
14
. The pulse generator
10
generates ultrashort wave pulse. The external modulator
11
converts the ultrashort wave pulse into optical pulse. The optical splitter
12
splits optical signal of the external modulator into 2
m
signals, if routing information is m bit information. The optical splitter
13
receives optical signals from the splitter
12
and splits optical signal of. terminals into square of 2
m
+1 signals. The optical delay line
14
receives output signal of the optical splitter
13
and delays the optical signal by multiple of &tgr;.
With the structure described above, the pulse generator
10
generates ultrashort wave pulse and the ultrashort wave pulse is converted into optical pulse by the external modulator
11
. If routing information is m bit, the optical splitter
12
splits the optical signal into 2
m
signals. At each output terminal of the splitter
12
, the signal is split into square of 2
m
+1 signals by the splitter
13
. 2
m
+1 optical delay lines are connected for encoding with CDM (code division multiplexing) scheme in accordance with code value of OOC (Optical Orthogonal Code) like prime code.
The routing decoder includes an optical splitter
15
, an optical splitter
16
, and an optical delay line
17
. The optical splitter
15
receives the optical CDM signals and splits the signal into 2
m
signals. The optical splitter
16
receives optical signals from the splitter
15
and splits optical signal of terminals into square of 2
m
+1 signals. The optical delay line
17
receives output signal of the optical splitter
16
and delays the optical signal by multiple of &tgr;.
With the structure described above, the optical splitter
15
receives the optical CDM signals and splits the signal into 2
m
signals. At each output terminal of the splitter
15
, the optical signal is split into square of 2
m
+1 signals by the splitter
16
. 2
m
+1 optical delay lines are connected as the optical delay line
14
in FIG.
1
A. Routing information is decoded and decoded signal is generated to routing controller.
Totally, 2
m
+1 optical delay lines are connected with the optical delay line
14
and
17
of the routing address encoder and the decoder.
Optical loss is big at the conventional optical routing circuits described because there are a number of optical splitting terminals. In addition, since the number and the length of optical delay lines are increased, it is impossible to implement small size optical routing circuit with conventional scheme.
SUMMARY OF THE INVENTION
A routing address encoder for encoding routing information with optical signals in optical communication networks is provided. A routing address encoder in accordance with an embodiment of the present invention includes a pulse generator, an external modulator, an optical address generator, an address selection signal generator, an optical switch, and optical OR gate means. The pulse generator generates ultrashort wave pulse a, b, and c. The external modulator converts the ultrashort wave pulse a and c into optical pulse. The optical address generator uses the converted optical pulse a′ as a control bit for upper m/2 (m: bit number of routing address) and generates optical address d. The address selection signal generator receives the ultrashort wave pulse b, uses the ultrashort wave pulse as a control bit for lower m/2, selects an output of the optical address generator, and generates address selection signal e. The optical switch switches input of the optical address generator. The optical switch is controlled by output of the address selection signal generator. The optical OR gate means performs OR operation with reference pulse c′ and output f of the optical switch and generates routing address g. The external modulator converts the reference pulse into optical signal.
Preferably, the pulse a is continuously generated 2
m/2
pulses with a period &tgr;(&tgr;=routing address encoding time/2
m
: after reference pulse is generated and the pulse b is pulse generated with 2
m/2
&tgr; period after &tgr; from generating reference pulse, and the pulse c is reference pulse.
Preferably, the optical address generator includes an optical splitter, an optical delay line, and an optical selector. The optical splitter receives the pulse a and splits the pulse a into m signals, if bit number for routing address is m. The optical delay line receives the split signal from the optical splitter and delays the split signal by 2
m/2
multiple of &tgr;. The optical selector uses upper m/2 bit of routing address as a control bit and selects output of the optical delay line.
Preferably, the address selection signal generator includes an electrical delay line and a selector. The electrical delay line receives the pulse b and delays the pulse b by multiple of &tgr;. The selector uses lower m/2 bit of routing address as a control bit and selects output of the electrical delay line.
An optical routing circuit for decoding optical routing information received from optical communication network and routing optical signals on the basis of routing address is provided. An optical routing circuit includes a routing controller, and a routing switch.
The routing controller provides routing control signal in response to input routing signal. The routing controller includes an optical splitter, an optical address decoder and routing control signal generating part. The optical splitter splits input routing signal into 2
m
signals. The optical address decoder converts binary routing address information into pulse position and decodes routing signal encoded with reference signal. The binary routing address information is generated through terminals of the optical splitter. The routing control signal generating part detects optical signal generated by the optical address decoder and generates routing control signal with the help of the detected optical signal. The routing switch switches routing signal provided by the routing controller.
Preferably, the optical address decoder includes an optical delay line, direct path line, and AND gate means. The optical delay line receives output signal of the optical splitter and delays the optical signal by multiple of &tgr;. The direct path line receives output signal of the optical splitter and passes the output signal without delay. The AND gate means performs AND operation with output of the optical delay line and output of the direct path line.
Preferably, the routing control signal generating part includes a number of photo detectors, a number of OR gates, and a number of D flipflops. The number of photo detectors detects optical signal output and provides the signal output as chip selector signals of D flipflops. The photo detector is connected with output terminal of the optical address decoder. The number of OR gates performs OR operation with output signals of the photo detectors and provides output of the OR operation as reset signals of D flipflops. The photo detector connected with a D flipflop for reset signal is excluded from this OR operation. The number of D flipflops generates control signal. The D flipflops are operated by the chip selector signals and the reset signals.
Preferably, the routing switch in

Affiliated with

Also associated with

Rating

Optical self-routing scheme with low optical loss and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Optical self-routing scheme with low optical loss and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Optical self-routing scheme with low optical loss and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3005279