Optical: systems and elements – Deflection using a moving element – Using a periodically moving element
Reexamination Certificate
1999-10-14
2002-12-31
Pascal, Leslie (Department: 2733)
Optical: systems and elements
Deflection using a moving element
Using a periodically moving element
C331S057000, C331S023000, C331S048000
Reexamination Certificate
active
06501583
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention is related to a voltage-controlled oscillator circuit (VCO) for constituting a phase-locked loop (PLL) circuit. This phase-locked loop circuit produces a clock signal in synchronism with input data and/or an input clock in an optical transmitter module and an optical receiver module used in an optical communication.
A voltage-controlled oscillator circuit (VCO) for constituting a phase-locked loop (PLL) circuit which produces a clock signal in synchronism with input data and also an input clock, corresponds to such an oscillator. An oscillating frequency of this VCO circuit is varied in response to a control voltage. In general, there are a multivibrator type VCO and a ring oscillator type VCO with respect to a VCO used in an integrated circuit (IC). In the case of a ring oscillator type VCO, since this VCO may be constructed only of transistors and resistors, this ring oscillator type VCO may be manufactured in the form of an IC. Also, in principle, since 4-phase clocks are outputted in which a phase of an oscillator signal is shifted by &pgr;/2, &pgr;, and 3&pgr;/2, this ring oscillator type VCO owns the following merit. That is, when a frequency comparator is arranged by employing such a ring oscillator type VCO, a necessary &pgr;/2-delay signal can be produced without employment of an additional circuit.
In
FIG. 1
, a typical ring oscillator circuit is indicated. An oscillation is initiated by such a way that outputs derived from two-staged differential amplifiers are supplied as inputs to the corresponding differential amplifiers in a positive feedback manner, so that V
0
, V
90
, V
180
, and V
270
corresponding to 4-phase clock signals can be obtained. As an item indicative of a characteristic of a VCO circuit, there are an oscillating frequency and a frequency modulation sensitivity. This frequency modulation sensitivity represents a degree of changes in the oscillating frequencies with respect to a control voltage. In this type of system, an oscillating frequency is determined by a transition (cut-off) frequency “f
T
” of a transistor. In general, a transition frequency of a bipolar type transistor is expressed by the below-mentioned equation (1), assuming now that a collector-to-base capacitance is “Cbc”, a base-to-emitter capacitance is “Cbe”, and a mutual conductance is “g
m
”:
f
T
=g
m
/2&pgr;(
C
bc
+C
be
) (1)
where the values of “Cbc” and “Cbe” depend upon a device fabrication technology. Also, assuming now that an elementary electric charge is “q”, a collector current is “Ic”, the Boltzmann constant is “k”, and an absolute temperature is “T”, the mutual conductance “g
m
” may be expressed by the following equation (2), and is directly proportional to the collector current:
g
m
=(
q·I
c
)/(
k·T
) (2)
As a consequence, the oscillating frequency can be controlled by controlling the voltage “Vcont” shown in
FIG. 1
, and by varying an amount of a current “I
1
” flowing through the differential amplifier, and this ring oscillator may function as a voltage-controlled oscillator. As apparent from the above-described equation (1), the frequency modulation sensitivity indicative of a change in the oscillating frequencies with respect to a change in the control voltages will depend upon both Cbc and Cbe. Both Cbc and Cbe may be controlled in such a manner that while a plurality of transistors are employed, base, collector, and emitter terminals thereof are connected in parallel to each other. For example, when “n” pieces of transistors are connected in parallel to each other, a collector-to-base capacitance becomes “nCbc” and a base-to-emitter capacitance becomes “nCbe”. In this ring oscillator circuit, the parallel element number of the transistors which constitute the differential transistor pairs is varied so as to change these capacitances “Cbc” and “Cbe”, so that the frequency modulation sensitivity can be set. Such a system for controlling the oscillating frequency by controlling the currents of the differential transistor pairs is known from, for example, JP-A-9-326676.
In the related ring oscillator type VCO circuit, both Cbc and Cbe are changed by the parallel element number of the transistors of the differential pairs, so that the frequency modulation sensitivity is set. However, these capacitance values Cbc and Cbe are also related to the transition frequency, and therefore may give an adverse influence to the oscillating frequency. To set the oscillating frequency, this oscillating frequency is controllable by the collector current value in accordance with the above-explained equations (1) and (2). In a practical transistor, a range capable of satisfying the above-explained equation (2) is finite, and therefore, a setting width of an oscillating frequency is also finite. As previously explained, in this system, it is practically difficult to set both the oscillating frequency and the frequency modulation sensitivity to desirable values, respectively. In other words, in this VCO circuit, as to the oscillating frequency, the transition frequency “f
T
” of the transistor is varied by controlling the values of the currents flowing through the differential transistor pairs so as to control the oscillating frequency, whereas as to the frequency modulation sensitivity, this frequency modulation sensitivity is set to a desirable value by varying the capacitance values. However, since the capacitance values are also related to the oscillating frequency, it is practically difficult to design both the oscillating frequency and the frequency modulation sensitivity to the desirable values at the same time.
Also, in the related system, since the frequency of the oscillator is controlled by the values of the currents flowing through the differential pairs, the output amplitude of the oscillator becomes R×(I
1
+&Dgr;I), assuming now that the resistance values R
1
to R
4
connected to the differential transistor pairs are equal to “R”, and a change amount of currents is “&Dgr;I”. As a result, there are such problems that the output amplitude of the oscillator owns the current depending characteristic, and therefore, the phase detection sensitivity at the phase comparator may change due to this behavior.
Furthermore, in the circuit system shown in
FIG. 1
, when noise is mixed with the current source control voltage Vcont, both the oscillating frequency and the output amplitude are changed, the jitter contained in the output signal are readily increased.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above-described problems, and therefore, has an object to provide a frequency response controllable amplifier, a voltage-controlled oscillator (VCO), and a phase-locked loop (PLL) circuit, capable of increasing a flexibility of design, while enlarging a range for setting an oscillating frequency, and also a range for setting a frequency modulation sensitivity.
Another object of the present invention is to provide a frequency response controllable amplifier, a voltage-controlled oscillator (VCO), and a phase-locked loop (PLL) circuit, capable of increasing a flexibility of design, while enlarging ranges for setting both an oscillating frequency and a frequency modulation sensitivity, and moreover an oscillating frequency depending characteristic of an output amplitude can be canceled.
Another object of the present invention is to provide a frequency response controllable amplifier, a voltage-controlled oscillator (VCO), and a phase-locked loop (PLL) circuit, capable of increasing a flexibility of design, while enlarging ranges for setting both an oscillating frequency and a frequency modulation sensitivity, and moreover suppressing an increase of jitter caused by common mode noise.
A further object of the present invention is to provide a digital optical receiver module and a digital optical transmitter module, in which a phase-locked loop (PLL) circuit can be applied to an optical communication.
To achieve the above-explained objects, a voltage-contro
Akashi Mitsuo
Baba Naohiko
Hayami Akihiro
Irie Hiroki
Kikuchi Tomonao
OpNext Japan, Inc.
Pascal Leslie
Payne David C
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