Optical: systems and elements – Deflection using a moving element – Using a periodically moving element
Reexamination Certificate
1998-03-13
2001-10-16
Negash, Kinfe-Michael (Department: 2633)
Optical: systems and elements
Deflection using a moving element
Using a periodically moving element
C359S199200, C330S059000, C250S2140AG
Reexamination Certificate
active
06304357
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to optical receivers, and more particularly, to an optical receiver that adjusts the output swing in response to a change in the signal input, with high sensitivity and over a wide dynamic range.
2. Description of the Related Art
FIG. 1
shows a conventional optical receiver used in an optical transmission system for a main line having a maximum transmission distance of 100 km, for example. A receiving element (for example, an avalanche photodiode APD) receives an input optical signal, and outputs an optical ON/OFF rectangular pattern (corresponding to the binary signals “1” and “0”, respectively) for every time period &Dgr;t, at a data rate of 1 bit. FIGS.
2
(
a
)-
2
(
c
) illustrate a decision operation of the optical receiver for 6 bits of the input optical signal.
In the APD, an electron-hole pair induces avalanche multiplication, as caused by the optical signal, to amplify the signal current (FIG.
2
(
a
)). This amplification makes it possible to detect even a weak optical signal. The current signal output from the APD is converted to a voltage signal VPRE by a preamplifier PRE (FIG.
2
(
b
)). This signal VPRE is further amplified by an automatic-gain-control amplifier AGC (also known as a “gain-controllable amplifier”), and the resulting signal VAGC is input to a decision circuit DEC (FIG.
2
(
c
)).
Even if the intensity of the input optical signal is weak (for example, as illustrated by the broken curve in FIG.
2
(
a
)), the swing of the output signal VAGC of the AGC amplifier is held at a substantially constant level by the automatic gain control function of the AGC amplifier. As a result, the decision made by the decision circuit is stabilized.
In the decision circuit DEC, the datq are output in synchronism with a clock signal CLK by deciding that the output signal VAGC of the AGC amplifier is high (“1”) if the output signal VAGC is higher than a reference voltage VTH (also called VTH(DEC) below), or low (“0”) if lower than the reference voltage VTH. The clock signal CLK may be prepared from the output signal VAGC by a clock-extraction circuit CEXT.
An example of such an AGC amplifier is disclosed on pp. 815-822 of
IEEE Journal of Solid-State Circuits
, Vol. 29, No. 7 (1994), and illustrated in the present
FIG. 3. A
voltage signal V
PRE
from the preamplifier PRE is amplified by three stages of amplifiers, including gain-controllable amplifiers A
1
and A
2
, and a constant-gain amplifier A
3
. Then, the output of the constant-gain amplifier A
3
, which has a swing V
A3
, is input to a peak detector PD. This peak detector PD generates a DC voltage V
3
based upon the swing V
A3
using a capacitor C
PD
.
A reference circuit REF generates the nominal value of the peak voltage VN (the “nominal voltage swing”). This nominal value VN is adjusted by a variable voltage source P connected to the reference circuit REF.
In the gain control circuit GC, the voltage V
3
and the nominal value VN are compared so that voltages V
GC1
and V
GC2
for controlling the gains of the amplifiers A
1
and A
2
are set according to the difference (i.e., the deviation of the signal swing from the nominal voltage swing). Thus, the output swing of V
AGC
from the swing change of the input signal V
PRE
is suppressed to the end of obtaining a uniform swing according to the difference in circuit construction between amplifiers A
1
and A
2
.
According to the AGC amplifier of
FIG. 3
, a voltage signal VAGC having a swing of 500 mV is output at a rate of 13 Gb/sec for an input signal having a swing of either 10 mV or 300 mV. These output signals are output from two output buffers OB so as to be input to the decision circuit DEC and the clock-extraction circuit respectively.
The AGC amplifier of
FIG. 3
is further equipped with an offset-control circuit OC (having external capacitors C
OC
) for controlling the offsets of the amplifiers A
1
, A
2
, and A
3
.
In response to the output signal from the AGC amplifier, the decision circuit DEC decides whether the signal V
AGC
is “1” or “0”, by employing a voltage between the upper and lower ends of the swing voltage of the output signal as the reference voltage VTH(DEC).
FIG. 4
illustrates how the optical signal, as transmitted from the optical transmission passage (optical fibers, for example), is converted to a voltage signal by the preamplifier PRE. The abscissa indicates the signal voltage value, and the ordinate indicates the frequency with which the signal is generated at a predetermined voltage level. When the signals are transferred in response to the ON/OFF of the optical signal, the distribution is made, as illustrated by the solid curve in
FIG. 4
, with noise produced in the photoelectric converting element and in the preamplifier PRE. At this time, the reference voltage set by the decision circuit DEC is set to an intermediate value V
th
(A) between the average voltage value V
1
of a high signal (“1”) and average value V
0
of a low signal (“0”)
The “1” signal, however, may have a wider voltage distribution than that of the “0” signal. Specifically, the voltage distribution of a “1” signal takes the shape (illustrated by a broken curve in
FIG. 4
) in which the solid curve of
FIG. 4
is depressed in the ordinate direction. This shape is especially prominent when either an APD or an erbium-doped fiber amplifier (EDFA) in combination with a PIN junction photodetector (or PIN diode) is used as the optical receiving element. See “Optical Fiber Communication Technique”, published by NIKKAN KOGYO SHINBUN SHA. Voltages signals that do not exceed the reference voltage V
th
(A) are decided to be “0” signals even if they are “1” signals in fact, due to this error. The probability for these erroneous decisions is the “error rate” of the decision circuit. For the reference voltage V
th
(A), the error rate is defined as the ratio of the area of the region under the broken-line curve to the left of V
th
(A), to the entire area under the broken-line curve, which represents the voltage distribution of the actual “1” signal.
The error rate cannot be zero when the voltage distribution curve (broken curve) of the “1” signals and the voltage distribution curve (solid curve) of the “0” signals overlap. However, the error rate can be reduced when the threshold voltage is considerably shifted toward V
0
. For example, a threshold voltage V
th
(B) can be set at a point where the voltage distribution curve of the “1” signal and the voltage distribution curve of the “0” signal intersect. Hence, although not eliminated, the error rate can be reduced as low as the area ratio shown hatched in FIG.
4
.
Although some actual “0” signals (having an intensity over Vth(B)) are detected as “1” signals in the decision circuit due to an error component under Vth(B), the total error rate is reduced compared with that under Vth(A). Moreover, the distribution of the signal voltage extends wider than the magnitude (V
1
−V
0
) of the signal anyway, so that the error rate cannot be completely reduced to 0 irrespective of where the reference voltage is set. In the optical receiver, therefore, the reference voltage is set within a range that allows and achieves a remarkably low constant error rate (e.g., 10
−12
). Then, the transmission errors that do occur can be detected and corrected with an error correction code.
FIG. 5
schematically illustrates the relationship between the set range of the reference voltage and the optical signal intensity, with an error rate considered with an APD or the combination of an EDFA and PIN diode as the optical receiving element. The “1” signal indicates a wider voltage distribution than that of the “0” signal, as described above, so that the set range of the reference voltage is offset toward the “0” signal peak. When the optical signal intensity becomes lower, the set range of the reference voltage grows gradually narrower until the desired error rate cannot be achieved at all. The optical signal intensity at this point (indicated b
Hatta Yasushi
Masuda Toru
Ohhata Kenichi
Takeyari Ryoji
Washio Katsuyoshi
Hitachi , Ltd.
Mattingly Stanger & Malur, P.C.
Negash Kinfe-Michael
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