Optical proximity correction methods, and methods of forming...

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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C430S030000

Reexamination Certificate

active

06245468

ABSTRACT:

TECHNICAL FIELD
The invention pertains to optical proximity correction methods, as well as to methods of forming radiation-patterning tools.
BACKGROUND OF THE INVENTION
Photolithography is commonly used during formation of integrated circuits on semiconductor wafers. More specifically, a form of radiant energy (such as, for example, ultraviolet light) is passed through a radiation-patterning tool and onto a semiconductor wafer. The radiation-patterning tool can be, for example, a photomask or a reticle, with the term “photomask” being sometimes understood to refer to masks which define a pattern for an entirety of a wafer, and the term “reticle” being sometimes understood to refer to a patterning tool which defines a pattern for only a portion of a wafer. However, the terms “photomask” (or more generally “mask”) and “reticle” are frequently used interchangeably in modern parlance, so that either term can refer to a radiation-patterning tool that encompasses either a portion or an entirety of a wafer. For purposes of interpreting this disclosure and the claims that follow, the terms “photomask” and “reticle” will be given their historical distinction such that the term “photomask” will refer to a patterning tool that defines a pattern for an entirety of a wafer, and the term “reticle” will refer to a patterning tool that defines a pattern for only a portion of a wafer.
Radiation-patterning tools contain light-restrictive regions (for example, totally opaque or attenuated/half-toned regions) and light-transmissive regions (for example, totally transparent regions) formed in a desired pattern. A grating pattern, for example, can be used to define parallel-spaced conductive lines on a semiconductor wafer. The wafer is provided with a layer of photosensitive resist material commonly referred to as photoresist. Radiation passes through the radiation-patterning tool onto the layer of photoresist and transfers the mask pattern to the photoresist. The photoresist is then developed to remove either the exposed portions of photoresist for a positive photoresist or the unexposed portions of the photoresist for a negative photoresist. The remaining patterned photoresist can then be used as a mask on the wafer during a subsequent semiconductor fabrication step, such as, for example, ion implantation or etching relative to materials on the wafer proximate the photoresist.
A method of forming a radiation-patterning tool is to provide a layer of light-restrictive material (such as, for example, chrome) over a light-transmissive substrate (such as, for example, a fused silicon such as quartz), and subsequently etch a pattern into the light-restrictive material. The pattern can be etched by, for example, providing a masking material over the light-restrictive material, forming a pattern in the masking layer with an electron beam or a laser beam, and transferring the pattern to the underlying light-restrictive material with an etchant that removes exposed portions of the light-restrictive material. The patterned light-restrictive material can be considered to be “supported by” the tool, as well as to be “on” or “in” the tool.
In a typical process of fabricating semiconductor circuitry, a desired circuit pattern will be designed, and subsequently a radiation-patterning tool will be formed to create the pattern. A problem in forming the radiation-patterning tool is in correlating particular pattern shapes desired in the integrated circuitry to pattern shapes utilized in the tool. Specifically, a pattern shape formed in a tool will typically not be identical to a pattern shape generated with the tool because of interference patterns formed from light passing through the tool. The problem is described in
FIGS. 1-3
.
FIG. 1
illustrates a portion of a semiconductor wafer
10
comprising a material
12
thereover. Material
12
can comprise, for example, photoresist, and has a desired pattern
14
defined therein. Ultimately, pattern
14
is to be formed by passing light through a radiation-patterning tool to selectively expose the region encompassed by pattern
14
while not exposing other regions of material
12
. Accordingly, a radiation-patterning tool is to be constructed which patterns light in the shape of pattern
14
.
FIGS. 2 and 3
describe alternative approaches for designing such radiation-patterning tools.
Referring to
FIG. 2
, such illustrates a result obtained from utilizing a radiation-patterning tool having a pattern identical to the shape of pattern
14
formed therein. Specifically,
FIG. 2
shows a portion of a radiation patterning tool
16
having a light-restrictive material
18
formed over a substrate (not shown), and a pattern
20
formed within material
18
. Pattern
20
constitutes a region wherein light-restrictive material
18
has been removed.
FIG. 2
also shows a pattern resulting from passing light through patterning tools
16
. Specifically,
FIG. 2
shows semiconductive substrate
10
having material
12
thereover, and a pattern
22
corresponding to a region of material
12
exposed to light passing through pattern
20
of tool
16
. A dashed line
14
over fragment
10
of
FIG. 2
corresponds to the desired pattern shape
14
of FIG.
1
. It is noted that pattern
22
is a poor approximation of the desired shape
14
, and specifically that the corners of shape
14
are not present, and instead replaced by rounded features in the shape of pattern
22
. In referring to
FIG. 2
, it is to be understood that the shape of pattern
22
is a qualitative approximation to a pattern expected from the shape
20
of tool
16
, and is provided for diagrammatic purposes only. The illustrated shape of pattern
22
is not a quantitative representation.
FIG. 3
describes a prior art method which has been developed to compensate for the problem described with reference to FIG.
2
. Specifically,
FIG. 3
illustrates a radiation-patterning tool
26
having light-restrictive material
18
formed over a substrate (not shown) and a pattern
28
formed therein. Pattern
28
has been developed utilizing optical proximity correction (OPC) software, such as, for example, a Taurus-OPC™ module (available from Avant! Corporation of Portland, Oregon). Specifically, the desired pattern
14
(
FIG. 1
) is digitally mapped and provided to the software program, together with the wavelength of light which is to be passed through a radiation-patterning tool to form the pattern
14
. The software then determines a pattern
28
which should be formed in the radiation-patterning tool to pattern the light in a shape which closely approximates the desired shape
14
.
FIG. 3
illustrates a portion of a semiconductive wafer having material
12
formed thereon and a pattern
30
formed by passing radiation through tool
26
.
FIG. 3
also shows a dashed line on fragment
10
corresponding to the desired shape
14
. It is noted that pattern
30
more closely approximates desired shape
14
than did pattern
22
of FIG.
2
. In referring to
FIG. 3
, it is to be understood that the patterns
28
and
30
are qualitative approximations to actual patterns. The illustrated patterns
28
and
30
are not quantitative representations.
A difficulty in utilizing OPC software can be in reducing the calculation time required for determining corrections for patterning tools having substantial size or complexity. For instance, in dynamic random access memory (DRAM) fabrication, there can be literally millions of circuit elements which are to be patterned with a single radiation-patterning tool. Mapping these elements into OPC software, and subsequently processing the elements to determine appropriate optical proximity corrections can take days. Accordingly, shortcuts have been developed for utilizing OPC in fabrication of DRAM circuitry. For instance, it is recognized that DRAM circuitry frequently comprises highly repetitive regions corresponding to DRAM arrays, and relatively non-repetitive regions corresponding to peripheral circuitry around the arrays. Accordingly, OPC of DRAM arrays is typically done in

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