Optics: measuring and testing – Inspection of flaws or impurities – Surface condition
Reexamination Certificate
2003-03-04
2004-10-26
Font, Frank G. (Department: 2877)
Optics: measuring and testing
Inspection of flaws or impurities
Surface condition
C356S237100, C356S237400
Reexamination Certificate
active
06809809
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to optical metrology for large-area substrates. In particular, the present invention relates to methods and apparatus used to detect defects and particle contamination on such substrates.
BACKGROUND OF THE INVENTION
It is well known that the presence of contaminant particles on the surface of electronic substrates such as semiconductor wafers can lead to the formation of defects during the microelectronics fabrication process. In order to maintain high manufacturing yield and thus low manufacturing costs, it is necessary that contaminated wafers be identified during the manufacturing process. Several automated optical inspection systems are commercially available for the purpose of detecting particles and defects on wafers and like substrates.
In general, wafer inspection systems can be divided into two broad classes: (i) those that detect particles by light scattering as the wafer surface is scanned by a laser; and (ii) those that detect particles and defects through processing of a captured digital image. In both these approaches, generally only a small portion of the wafer is illuminated at a time, therefore requiring the wafer to move relative to the illuminating beam to enable the entire surface to be inspected. The laser light scattering systems have traditionally been used mainly for inspecting un-patterned wafers, while the digital image processing systems have been used mainly for inspecting patterned wafers. Recently, laser scanning and light scattering systems have also been used for detecting defects on patterned wafers.
Wafer inspection tools such as those described above have been configured as specialized stand-alone inspection systems designed to provide sensitivity to extremely small defects and particles, and are thus complex in design and expensive. In semiconductor production fabs, patterned wafer inspection tools are used to monitor defects on product wafers. Many of these tools are digital image processing systems, which typically use microscope objectives to image a small portion of the wafer at a time. The pixel size is typically on the order of the minimum feature size, requiring an enormous number of pixels to be processed. For example, detection of 0.5 micrometer (&mgr;m) minimum defects on a 150 millimeter (mm) wafer requires about 2.8×10
11
pixels. For 200 mm wafers the corresponding number of pixels to be processed is on the order of 5×10
11
or higher. Since the inspection throughput of such systems is fairly low, only a few wafers per lot are normally inspected. Additionally, the high cost of these inspection systems necessarily means that the number of such systems present in production lines used in microelectronics manufacture is low, with the result that inspections for particles and defects are relatively few and far between. Since a very large number of process steps are involved in the manufacture of microelectronics and semiconductor devices, a sparse sampling of wafers in the production line may lead to contaminated wafers remaining undetected for a long period of time, leading to lower yield and increased rework costs.
More recently, wafer inspection tools designed for integration into microelectronics processing equipment have been disclosed. These integrated metrology tools are designed to perform in-line inspection of wafers, and therefore provide rapid feedback of process excursions and other problems. A related class of fast wafer inspection tools is known in the industry as “macro-inspection” tools, which are also available for in-line inspection of wafers in the manufacturing line.
At present, the wafer inspection tools available for integrated metrology have the drawbacks of being either too slow (inspection taking greater than 60 seconds per wafer) or too insensitive (less than 25 micrometer defect sensitivity), and these drawbacks limit the application of such prior art methods. Furthermore, presently available wafer inspections systems inspect only one surface of the wafer, usually the top (or active) surface, onto which the integrated circuits are etched. In general, wafer inspection systems also exclude the wafer edges from inspection. They are thus not suited for some of the newly emerging applications such as the inspection of the wafer's edges, back surface and bevels.
Copper contamination of the wafer back surface has the potential to contaminate process metrology and handling equipment, which could in turn contaminate wafers that come into contact with them. Additionally, copper deposited on the wafer bevel can flake off in subsequent processing steps such as annealing and chemical mechanical polishing (CMP). Particles on the back surface of the substrate can cause focal problems during lithography and can result in rejected wafers. According to the International Technology Roadmap for Semiconductors, the backside particle requirement for optical lithography is less than 94 particles per 300 millimeter wafer for 0.18 micrometer technology, and less than 63 particles per wafer for 0.13 micrometer technology for particles that are greater than 0.2 micrometers.
There have been recent attempts to develop tools capable of inspecting both surfaces of a semiconductor wafer. For example, U.S. Pat. Nos. 6,156,580 and 6,401,008 disclose a wafer review system and method in which the front and back surfaces of a semiconductor wafer are inspected sequentially. First, the front surface of the wafer is scanned by an optical inspection tool. Then, the wafer is flipped using a wafer inverter to present the back surface for inspection. Although both the front and back surfaces are inspected, sequential inspection results in a low inspection throughput.
U.S. Pat. No. 6,204,918 discloses an optical device for simultaneously inspecting the front and back surfaces of a semiconductor wafer for defects. The system rotates the wafer while the front and back surfaces of the wafer are simultaneously scanned for defects. An air bearing is used to float the wafer on a cushion of air to eliminate contamination of the wafer surface due to contact with a wafer support surface. The wafer is rotated using motor-driven rollers that are positioned at the circumference of the wafer so that the rollers contact the wafer only at its beveled edges, thereby reducing edge contamination and permitting inspection of the entire wafer surface. While this wafer inspection system enables simultaneous inspection of wafer front and back surfaces, only a portion of the wafer surface is scanned at a time. This also limits inspection throughput. Further, the need for air bearing and wafer rotation mechanisms add complexity, bulk and cost to the system, making it less suitable for integrated metrology applications.
U.S. Pat. No. 6,392,738 discloses a backside inspection system for integrated metrology applications. In this system, a scanning laser-based backside inspection tool is integrated into a lithographic projection apparatus. However, this system also uses relatively complex mechanisms for rotating the wafer and translating the illuminating laser beam, and is capable of inspecting only a portion of the wafer at a time.
Thus, there is a need for new and improved inspection systems for inspecting both sides of a substrate. These systems should be flexible enough to handle the existing and immerging demands of the semiconductor industry, such as high speed, low cost, in-line inspection of the sub-micron defects.
SUMMARY OF THE INVENTION
One embodiment of the present invention is directed to an optical inspection module for inspecting a substrate having first and second opposite planar surfaces. The module includes a substrate holding position and first and second measurement instruments. The first measurement instrument includes a first illumination path extending to the substrate holding position and having a grazing angle of incidence with respect to the first surface of the substrate when the substrate is held in the substrate holding position. The first illumination path illuminates substanti
Gupta Anand
Kinney Patrick D.
Rao Nagaraja P.
Font Frank G.
Nguyen Sang H.
Real Time Metrology, Inc.
Westman Champlin & Kelly
LandOfFree
Optical method and apparatus for inspecting large area... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Optical method and apparatus for inspecting large area..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Optical method and apparatus for inspecting large area... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3307444