Optics: measuring and testing – Inspection of flaws or impurities – Surface condition
Reexamination Certificate
2001-11-14
2003-10-07
Font, Frank G. (Department: 2877)
Optics: measuring and testing
Inspection of flaws or impurities
Surface condition
C356S237100, C356S237400
Reexamination Certificate
active
06630996
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to optical metrology for large-area substrates. In particular, the present invention relates to methods and apparatus used to detect defects and particle contamination on such substrates.
BACKGROUND OF THE INVENTION
It is well known that the presence of contaminant particles on the surface of electronic substrates such as semiconductor wafers can lead to the formation of defects during the microelectronics fabrication process. In order to maintain high manufacturing yield and thus low manufacturing costs, it is necessary that contaminated wafers be identified during the manufacturing process. Several automated optical inspection systems are commercially available for the purpose of detecting particles and defects on wafers and like substrates.
In general, wafer inspection systems can be divided into two broad classes: (i) those that detect particles by light scattering as the wafer surface is scanned by a laser; and (ii) those that detect particles and defects through processing of a captured digital image. In both these approaches, generally only a small portion of the wafer is illuminated at a time, therefore requiring the wafer to move relative to the illuminating beam to enable the entire surface to be inspected. The laser light scattering systems have traditionally been used mainly for inspecting un-patterned wafers, while the digital image processing systems have been used mainly for inspecting patterned wafers. Recently, laser scanning light scattering systems have also been used for detecting defects on patterned wafers.
Wafer inspection tools such as those described above have been configured as specialized stand-alone inspection systems designed to provide sensitivity to extremely small defects and particles, and are thus complex in design and expensive. In semiconductor production fabs, patterned wafer inspection tools are used to monitor defects on product wafers. Many of these tools are digital image processing systems which typically use microscope objectives to image a small portion of the wafer at a time. The pixel size is typically on the order of the minimum feature size, requiring an enormous number of pixels to be processed. For example, detection of 0.5 micrometer (&mgr;m) minimum defects on a 150 millimeter (mm) wafer requires about 2.8×10
11
pixels. For 200 mm wafers the corresponding number of pixels to be processed is on the order of 5×10
11
or higher. Since the inspection throughput of such systems is fairly low, only a few wafers per lot are normally inspected. Additionally, the high cost of these inspection systems necessarily means that the number of such systems present in production lines used in microelectronics manufacture is low, with the result that inspections for particles and defects are relatively few and far between. Since a very large number of process steps are involved in the manufacture of microelectronics and semiconductor devices, a sparse sampling of wafers in the production line may lead to contaminated wafers remaining undetected for a long period of time, leading to lower yield and increased rework costs.
Many of the above particle detection systems described above use specialized signal processing techniques to minimize background scatter when inspecting patterned microelectronic substrates. For laser scanning light-scattering systems, a locally varying threshold combined with periodic feature elimination has been used to distinguish defects from the background pattern. The pattern features may be eliminated by comparing signals from adjacent repeating patterns in a die-to-die comparison. Examples of such systems have been disclosed in U.S. Pat. Nos. 5,864,394, and in 5,355,212.
The image processing based inspection systems also have used image-to-image comparison for eliminating the background due to the pattern. The reference image used for comparison could be (i) an image of a duplicated region such as an adjacent die, (ii) an image of a known good part stored in an image database, or (iii) an image created from computer-aided design (CAD) rule data.
Several inspection systems based on optical pattern filtering using Fourier masks have also been described in literature for the inspection of patterned wafers having periodic features. These systems are based on the idea that periodic features on the wafer being inspected can be filtered out of an image in the optical Fourier transform plane while random defect features are transmitted. This technique was originally developed for inspecting masks, and more recently has been used for patterned wafer inspection. The substrate with periodic features is illuminated by a coherent plane wave and imaged by a Fourier transform lens, which creates a diffraction pattern image at its focal plane—the Fourier plane. Periodic features on the object are mapped onto bright, intense spots in the diffraction pattern. A transparent plate with opaque regions is placed in the Fourier plane so that the opaque portions mask the bright spots originating from periodic features. The light passing through the transparent regions of the mask is collected by a second Fourier transform lens creating an image on its focal plane, which is recorded by a camera. This selective masking (spatial filtering) in the Fourier plane creates an image in which the periodic background pattern has been filtered out, enabling defect features to be more easily detected.
It should be noted that such Fourier filtering has been generally considered impractical when the repeat distances for the patterns is large compared to the wavelength of light used. In this case, the diffraction pattern contains many closely spaced spots arising from multiple diffracted orders, and fabricating and aligning a suitable mask poses difficulties. Furthermore, the available aperture for passing defect features is also limited.
In the case of prior art wafer inspection systems implementing optical pattern filtering, the wafer is usually imaged at high magnification with sub-micron pixels, and the repeating distances within a die are generally on the order of a few wavelengths of light. In this situation Fourier filtering is more easily implemented. Imaging at high magnification necessitates the processing of a very large number of images (~10
5
) or pixels (~10
11
) per wafer. Considering the large number of images to be processed, it is no surprise that prior art systems have implemented Fourier filtering via optical hardware, i.e. using Fourier transform optics and masks, since this enables the Fourier transform and resulting filtering to be accomplished literally at the “speed of light” and therefore permits a reasonable throughput. However, at high magnification since only a portion of a die is inspected at a time, these techniques are generally limited to the inspection of patterned wafers having significant intra-die periodicity, such as memory chips. Additionally, inspection of wafers with different patterns requires different hardware masks which are cumbersome to use and also add to the tool set-up time and cost. Finally, the implementation of Fourier filtering in hardware generally requires the use of coherent light, therefore restricting practical illumination sources to lasers.
More recently, an alternate technique for inspecting patterned semiconductor wafers has been disclosed in Aiyer et al, U.S. Pat. No. 5,777,729 entitled “Wafer Inspection Method and Apparatus Using Diffracted Light.” This method appears to be based on detecting bright, highly directional diffracted light from the pattern structures on the wafer and is useful for detecting large macro-defects. The relatively low sensitivity associated with macro-defect inspection may not meet the requirements of present day semiconductor manufacturers interested in detecting sub-micron defects, associated with the sub-micron feature sizes found on the state-of-the-art integrated circuits.
There is thus a continuing need for wafer inspection systems that are capable of providing more rapid feedback regarding proces
Kinney Patrick D.
Rao Nagaraja P.
Font Frank G.
Nguyen Sang H.
Real Time Metrology, Inc.
Westman Champlin & Kelly
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