Dynamic information storage or retrieval – Binary pulse train information signal – Including sampling or a/d converting
Reexamination Certificate
2011-04-05
2011-04-05
Hindi, Nabil Z (Department: 2627)
Dynamic information storage or retrieval
Binary pulse train information signal
Including sampling or a/d converting
C369S059120, C369S059160
Reexamination Certificate
active
07920453
ABSTRACT:
An adaptive equalization circuit (105) operates for PR-equalization of the reproduced signal that is subjected to an A/D conversion by an A/D converter (103) and shaped by a waveform shaping circuit (104). An ideal-waveform generation circuit (110) generates an ideal waveform that corresponds to the reproduced signal that is binarized by a Viterbi-decoding circuit (108). A mark-length/space-length calculation circuit (112) calculates the actual mark length/space length relative to the mark length/space length to be formed, based on the equalization error that arises when the ideal waveform assumes a central reference level as calculated by an equalization-error calculation circuit (111) and the intervals of polarity inversions of binarized data detected by a 0-cross detection circuit (109). A system controller (114) adjusts the edge shift quantity of the recording waveform when forming a mark based on the calculated mark length/space length.
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English-Language Translation of Form PCT/IPEA/409.
Hindi Nabil Z
McGinn IP Law Group PLLC
NEC Corporation
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