Dynamic information storage or retrieval – Binary pulse train information signal – Binary signal gain processing
Patent
1989-12-20
1992-06-23
Canney, Vincent P.
Dynamic information storage or retrieval
Binary pulse train information signal
Binary signal gain processing
G11B 2010
Patent
active
051249685
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
This invention relates to an apparatus for producing clock signals on the basis of a recording pattern formed at a predetermined period on a recording track, and a method for reproducing the clock signals.
BACKGROUND OF ART
In an optical disc apparatus in which clock signals are obtained on the basis of the recording pattern formed at a predetermined period on an optical disc, there is known an apparatus in which clock signals are produced on the basis of the recording pattern recorded at a predetermined period on an optical disc, referred to hereinafter as the servo pattern, and signal recording and reproduction are performed using the clock signals as the reference.
This type of optical disk apparatus 1 is shown for example in FIGS. 1 and 2, wherein an optical disc 2, on the recording tracks of which the servo patterns are formed at a predetermined period, is rotated at a reference rotational speed by a spindle motor 3.
The servo pattern is formed by forming pits at a predetermined interval on the recording tracks of the optical disc 2. The servo pattern is so set that, when the optical disc 2 is rotated at a predetermined rotational speed, the interval between the bits is equal to 18 periods of a predetermined reference time T.sub.REF, or 18 T.sub.REF.
An optical head 4 irradiates the optical disc 2 with a light beam and receives the reflected light by a detection element to produce a reproduction signal S.sub.RF, shown at B in FIG. 2, having its signal level falling in accordance with the pit formed on the optical disc 2. The optical head 4 outputs this reproduction signal S.sub.RF to a pattern detection circuit 6, while outputting the reproduction signal S.sub.RF to a zero crossing detection circuit 9 by way of differentiating circuit 7 and a delay circuit 8.
The zero-crossing circuit 9 receives from a counter circuit 10 a switching signal S.sub.C1 which goes to a logically high level during 20 periods of the clock signal S.sub.CK, or 20 T, each time 270 clock signals are counted at the counter circuit 10. An output signal is then obtained which rises in signal level at the time the differentiation signal of the reproduction signal S.sub.RF rises from 0 V and during the time interval of 20 T in which the aforementioned switching signal S.sub.C1 is at the logically high level.
A voltage controlled oscillator circuit 11 receives an output signal of the zero-crossing detection circuit 9 by way of a switching circuit 12 and a filter circuit 13, while outputting the oscillation output signal as the aforementioned clock signal S.sub.CK. The voltage controlled oscillator circuit 11 constitutes, in conjunction with the aforementioned zero-crossing detection circuit 9, the switching circuit 12, the filter circuit 13 and the counter circuit 10, a phase locked loop (PLL) circuit which fetches the reproduction signal S.sub.RF at a period 270 times the aforementioned clock signal S.sub.CK, during the time equal to 20 periods of the clock signal S.sub.CK, or 270 T, and outputs the clock signal S.sub.CK on the basis of the phase data of the reproduction S.sub.RF.
The frequency dividing ratio 270 is so set that, when the period T of the clock signal S.sub.CK coincides with the reference period T.sub.REF indicating the pit-to-pit interval, the period 270 T at which the PLL clock acquires or fetches the reproduction signal S.sub.RF coincides with the repetition period of the servo pattern, and that the period 20 T of acquiring or fetching the reproduction signal S.sub.RF coincides with the time interval since the acquisition of the reproduction signal S.sub.RF of the first pit of the servo voltage until the acquisition of the reproduction signal S.sub.RF of the next following pit as shown in FIG. 2B.
Once the period T of the clock signal S.sub.CK coincides with the reference period T.sub.REF, there is obtained the clock signal S.sub.CK which is phase locked to the reference period T.sub.REF on the basis of the servo pattern.
Thus, in the present optical disc apparatus 1, the servo pattern is first d
REFERENCES:
Digital Logic and Computer Design by M. Morris Mano, Prentice Hall Inc., pp. 207, 208.
Canney Vincent P.
Sony Corporation
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