Opposed dual-gate hybrid structure for three-dimensional integra

Details Opposed dual-gate hybrid structure for three-dimensional integra Opposed dual-gate hybrid structure for three-dimensional integra

1987-06-09

1988-05-31

James, Andrew J.

357 2314, 357 4, H01L 2978

Patent

active

047484853

ABSTRACT:
A three-dimensional integrated circuit structure utilizing a hybridization of silicon-on-insulator and silicon-on-sapphire technologies is disclosed, wherein a buried doped epitaxial silicon layer, insulated from a gated semiconductor device by a buried insulating layer, biases the gate region of the overlying semiconductor device, thereby providing a second gate positionally opposed to the conventional first gate of the semiconductor device. The second gate (or backgate) is utilized to draw undesired charge carriers from its overlying insulating layer, thereby avoiding the undesirable effects of the presence of such excess charge carriers, which typically may be induced by external radiation. The selectable backgating feature is fully compatible with existing integrated circuit fabrication technology, and may be utilized to provide a single backgate for all overlying semiconductor devices, or individual backgates for one or groups of semiconductor devices in island-etched structures.

REFERENCES:
patent: 4272880 (1981-06-01), Pashley
patent: 4570175 (1986-02-01), Miyao et al.

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