Operational transconductance amplifier and Bi-MOS multiplier

Amplifiers – With semiconductor amplifying device – Including differential amplifier

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330253, 327357, 327359, H03F 345

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055237177

ABSTRACT:
An operational transconductance amplifier having a good transconductance linearlity within a wide input voltage range that can be realized easily without increase in chip area. There are a first balanced differential pair of first and second MOS transistors that are driven by a first constant current source, and a second balanced differential pair of third and fourth MOS transistors that are driven by a second constant current source. The first, second, third and fourth transistors have the same transconductance parameter. Drains of the first and fourth transistors are coupled together and drains of the second and third transistors are coupled together. A differential output current of the amplifier is derived from the output ends of the first and fourth transistors and the output ends of the second and third transistors. Gates of the first and third transistors are applied with an input voltage. Gates of the third and fourth transistors are applied with a voltage produced by dividing the input voltage.

REFERENCES:
patent: 5006818 (1991-04-01), Koyama et al.
H. Khorramabadi, "High-Frequency CMOS Continuous Time Filters", University Microfilms International, 1985, pp. 51-71.
K. Kimura, "A Unified Analysis of Four-Quadrant Analog Multipliers Consisting of Emitter and Source-Coupled Transistors Operable on Low Supply Voltage", IEICE Trans. Electron., May 1993, vol. E76-C, No. 5, pp. 715-737.

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