Operational approach for the suppression of bi-directional tunne

Details Operational approach for the suppression of bi-directional tunne Operational approach for the suppression of bi-directional tunne

1999-09-23

2000-04-11

Phan, Trong

Static information storage and retrieval

Floating gate

Particular biasing

36518529, 36518533, 365218, G11C 1604

Patent

active

060494794

ABSTRACT:
A method of erasing a flash memory cell to suppress bi-directional tunnel oxide stress that includes applying a negative voltage to the control gate of the flash memory cell, applying a bias voltage to the substrate of the flash memory cell and applying a bias voltage to the drain of the flash memory cell that equals the bias voltage applied to the substrate minus a fraction of a diode voltage drop across the drain junction formed between the drain and the substrate. The bias voltage applied to the drain is selected so that the drain junction is not forward biased. The fraction is in the range of 20% to 80% of the diode voltage drop.

REFERENCES:
patent: 5828605 (1998-10-01), Peng et al.
patent: 5959891 (1999-09-01), Sansbury

Affiliated with

Also associated with

Rating

Operational approach for the suppression of bi-directional tunne does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Operational approach for the suppression of bi-directional tunne, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Operational approach for the suppression of bi-directional tunne will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1181528