Operational amplifier with chopped input transistor pair

Amplifiers – With periodic switching input-output

Reexamination Certificate

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Details

C330S253000, C330S069000, C327S124000

Reexamination Certificate

active

06707336

ABSTRACT:

The invention relates to an operational amplifier circuit with chopped input transistor pair and an operational amplifier circuit comprising such an operational amplifier.
The demand for mobile equipment, like telecommunication products, computers and the like, in combination with higher integration levels results in an on going trend towards complete system on a single device. Generally, mixed signal chips have large digital parts and only a small area is used to implement the analog functionality. Therefore, the preferred process technology for manufacturing signal chips is CMOS. At the present, there are problems to provide the required performance for telecommunication applications with pure digital CMOS processes. It is desirable to improve this technology in order to get also to single chip solutions for applications like GSM (global system for mobile communications) or Bluetooth in CMOS technology.
One of the basic problems in CMOS technology is the 1/f-noise. Basically, there are three ways to handle 1/f-noise: one can use BICMOS instead of pure CMOS technologies, one can use very large transistors or one applies chopping. BICMOS is much more expensive than CMOS and usually generations behind the latest CMOS process. Using large transistors will result in lower 1/f-noise but has the drawback of an increased current consumption and higher capacitances in the circuit. A degraded performance and increased costs would be the results of this solution. The only way, to overcome 1/f-noise problem without costs disadvantages appears to be chopping. In circuits for telecommunications applications chopping causes, however, a fundamental problem which is cross-modulation. Due to cross-modulation the output signal at the operational amplifier output will not consist of the amplified input signal alone but has an additional error signal as well. This error signal is composed out of two components: the spikes seen when switching the chopper switches and an image of the input signal which is shifted in frequency by the chopping frequency. This image appears if the switching spikes are not constant for all input signals but depend on the input signal level seen at the operational amplifier input. The spikes itself are in most cases uncritical but the image of the input signal may degrade the performance of telecommunications circuits severely.
In a conventional chopping circuit of a differential amplifier, the input transistor pair of the amplifier stage are chopped with a frequency of f
chop
for chopping the 1/f-noise of the input transistors. The problem of cross modulation occurs at the switches at the output of the input transistors because the signal which is input to the differential amplifier, is amplified, at that point of the circuit, with a gain of g
m1,2
*Rc, and this gain is large enough to produce distortion due to switching (cross modulation) which distortion is input-signal dependent. Therefore, in order to use chopping in circuits which are adapted for telecommunication applications, it is required to reduce cross modulation or distortion of the signal at the output of the input amplifier stage.
In view of the above, it is an object of the invention to provide an operational amplifier with chopped input transistors which is optimized for low noise and low voltage and are, thereby, adapted in particular for telecommunication applications like GSM, Bluetooth or HiperLAN applications.
For this purpose, the invention provides an operational amplifier comprising a first transistor amplifier stage at an input of the operational amplifier, which first transistor amplifier stage comprises chopped transistors, a second transistor amplifier stage cascoded to the first transistor amplifier stage, which second transistor amplifier stage is connected between the chopped first transistor amplifier stage and a supply voltage source, wherein the gain at the output of the chopped first transistor amplifier stage is reduced to g
m1,2
/g
m3,4
, where g
m1,2
*Rc is the gain of the complete input stage, 9
m3,4
*Rc is the gain of the second transistor amplifier stage and Rc is the resistance of the resistor between an output of the operational amplifier and the supply voltage source.
In cascoded amplifier stages, the transistors of the cascoded amplifier stage do not contribute significantly to the 1/f-noise because the signal level of the useful signal is, at that point of the circuit, well above the noise level and, furthermore, the signal transfer function for the 1/f noise of the cascade stage is limited due to the high output impedance of the input transistors. Therefore, the remaining 1/f-noise is only due to the transistors at the input amplification stage where cross modulation is not a major problem anymore because the gain of the output signal of the input amplification stage is now reduced to g
m1,2
/g
m3,4
which means that the signal level and the output of the input amplification stage is not high enough anymore to produce substantial cross modulation. Therefore, the cross modulation or distortion of the signal due to switching of the input signals in the chopping scheme is dramatically reduced.
According to a preferred embodiment of the invention, the first transistor amplifier stage comprises a first and a second transistor connected to first and second switches, the second transistor amplifier stage is connected to the first amplifier stage through third and forth switches, the switches receiving a chopping frequency f
chop
to chop the inputs/outputs of the first and second transistor. In this operational amplifier circuit, the second transistor amplifier stage is directly connected to the switches at the output of the first amplifier stage which is a simple and the most effective way to embody the invention while ensuring that the cross modulation at the output switches of the chopped first amplifier stage is reduced.
According to a further preferred embodiment of the invention, the second transistor amplifier stage comprises a third and a forth transistor, the third and forth transistors of the second amplifier stage being connected to the supply voltage source through resistors. For high common mode suppression, the source terminals of the first and second transistors of the first amplifier stage are preferably connected via a current source establishing the voltage U
CS
between the input transistor sources and ground. The total amplification of both the first and the second amplifier stage can be balances such that the cross modulation is reduced at the output of the first amplifier stages whereas the desired total amplification is achieved by a combined effect of the first and the second amplifier stage.
According to a further preferred embodiment of the invention, the base terminals of the third and forth transistor of the second amplifier stage are connected via a bias voltage source U
bias
to ground, which is an efficient way to control the operation of the transistors of the second amplifier stage.
According to a further preferred embodiment of the invention, the second transistor amplifier stage comprises a further transistor which is connected to a supply voltage source acting as a current source. This is an alternative circuit arrangement for the input amplifier stage where the source of the transistor of the first amplifier stage is connected to ground. A common mode suppression is achieved by using a common mode output voltage regulator. Therefore, the source terminal and the backgate terminal of this transistor are on the same potential level which speeds up the operation of the transistor in the input amplifier stage.
According to a further preferred embodiment of the invention, the base terminal of the cascode transistor is connected via a bias voltage source U
bias
to ground. This, again, contributes to the freedom of properly designing the gain of the two amplifier stages.
For the above purpose, the invention provides an operational amplifier circuit comprising a main operational amplifier, wherein the main operational amplifier comprises feedback l

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