Operation scheme with charge balancing erase for charge...

Details Operation scheme with charge balancing erase for charge... Operation scheme with charge balancing erase for charge...

2006-07-11

2006-07-11

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185180, C365S185280, C365S185290

Reexamination Certificate

active

07075828

ABSTRACT:
A method of operating a memory cell comprises applying a first procedure (typically erase) to establish a low threshold state including a first bias arrangement causing reduction in negative charge in the charge trapping structure, and a second bias arrangement tending to the induce balanced charge tunneling between the gate and the charge trapping structure and between the charge trapping structure in the channel. A second procedure (typically program) is used to establish a high threshold state in the memory cell, including a third bias arrangement that causes an increase in negative charge in the charge trapping structure.

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