Operation of multiple select gate architecture

Details Operation of multiple select gate architecture Operation of multiple select gate architecture

2007-08-21

2007-08-21

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185180, C365S185280

Reexamination Certificate

active

11218848

ABSTRACT:
Methods of operating non-volatile memory devices including multiple series-coupled select gates on the drain and/or source ends of strings of non-volatile memory cells facilitate mitigation of gate-induced drain leakage and program disturb.

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D.J. Kim et al.; Process Integration for the High Speed NAND Flash Memory Cell; VLSI Technology Digest of Technical Papers; 1996; pp. 236-238.

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