Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2011-07-05
2011-07-05
Phan, Trong (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S185170, C365S185180, C365S185240, C365S185260, C365S185270, C365S185280, C365S185290, C365S185330
Reexamination Certificate
active
07974127
ABSTRACT:
A method for programming a first memory cell in a memory array. In a specific embodiment, each memory cell has a drain, a source, a channel, and a control gate overlying a charge storage material and the channel. The source of the first memory cell is coupled to the drain of a second memory cell. A voltage is applied to the drain of the first memory cell, and the source of the second memory cell is grounded. The method includes floating the drain of the second memory cell and the source of the first memory cell and turning on the channels of the first and second memory cells, effectively forming an extended channel region. Hot carriers are injected to the charge storage material of the first cell to program the first memory cell. The extended channel lowers electrical fields and reduces punch through leakage in unselected memory cells.
REFERENCES:
patent: 4803662 (1989-02-01), Tanaka
patent: 5557569 (1996-09-01), Smayling et al.
patent: 5912843 (1999-06-01), Jeng
patent: 6232634 (2001-05-01), Wu et al.
patent: 6441443 (2002-08-01), Hsu et al.
patent: 6667511 (2003-12-01), Fang
patent: 6690601 (2004-02-01), Yeh et al.
patent: 6757196 (2004-06-01), Tsao et al.
patent: 6903968 (2005-06-01), Jeng
patent: 6992925 (2006-01-01), Peng
patent: 7054196 (2006-05-01), Chen et al.
patent: 7057938 (2006-06-01), Yeh et al.
patent: 7072215 (2006-07-01), Chih
patent: 7099192 (2006-08-01), Wang et al.
patent: 7190623 (2007-03-01), Hsu et al.
patent: 7291882 (2007-11-01), Yang et al.
patent: 7394703 (2008-07-01), Ogura et al.
patent: 7411836 (2008-08-01), Kuo et al.
patent: 7583530 (2009-09-01), Thomas
patent: 7663916 (2010-02-01), Chih et al.
patent: 7864594 (2011-01-01), Tsai et al.
patent: 7876610 (2011-01-01), Gomikawa et al.
patent: 2007/0120171 (2007-05-01), He et al.
patent: 2009/0116287 (2009-05-01), Ou et al.
patent: 200421348 (2004-10-01), None
patent: 200423146 (2004-11-01), None
patent: 200713289 (2007-04-01), None
Office Action of Chinese Application No. 200810170463.7, dated Sep. 6, 2010, 4 pages total (English translation not included).
Chong Lit-Ho
Huang Jyun-Siang
Ou Tien-Fan
Tsai Wen-Jer
Kilpatrick Townsend and Stockton LLP
Macronix International Co. Ltd.
Phan Trong
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