Operation method of nitride-based flash memory and method of...

Details Operation method of nitride-based flash memory and method of... Operation method of nitride-based flash memory and method of...

2008-07-03

2010-11-02

Mai, Son L (Department: 2827)

Static information storage and retrieval

Floating gate

Disturbance control

C365S185180, C365S185240, C365S185270

Reexamination Certificate

active

07826262

ABSTRACT:
A method for operating a nitride-based flash memory is provided. The operation method includes pre-performing an interference reduction operation (IRO) before the routine programming operating step. Through bias arrangement of the target memory cell, charges are injected into the charge trapping layer mainly above the junction regions of the memory cell before programming so as to reset the influences caused by coupling interference issues. The operation method of this present invention not only reduces coupling interference but also afford a wider operation window.

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Article titled “The Impact of Interference on Multi-Level-Cell Applications in Scaled Nitride-Storage Flash Memory” authored by Yang, et al., This paper appears in: Non-Volatile Semiconductor Memory Workshop, 2008 and 2008 International Conference on Memory Technology and Design. NVSMW/ICMTD 2008. Joint, May 18-22, 2008 (pp. 124-125).

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