Operation code selected overflow interrupts

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G06F 934

Patent

active

046494782

ABSTRACT:
Apparatus is provided which interrupts arithmetic and logical operations defined by a major opcode instruction if the resultant overflows its defined length. One major opcode defines the arithmetic and logical operations between two operands in registers and the result, zero, one, the generated condition or first operand is stored in a register.

REFERENCES:
patent: 4312034 (1982-01-01), Gunter et al.
patent: 4346437 (1982-08-01), Blahut et al.
patent: 4409654 (1983-10-01), Wada et al.
patent: 4498136 (1985-02-01), Sproul, III

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