Operation circuit and operation control method thereof

Data processing: artificial intelligence – Neural network – Structure

Reexamination Certificate

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C706S015000, C706S035000, C706S033000

Reexamination Certificate

active

07120617

ABSTRACT:
A product-sum operation circuit includes a pulse width/digital conversion circuit (9) which converts a pulse signal having a pulse width representing an operand value into a digital signal, a sorting circuit (4) which outputs, in descending or ascending order of magnitude, a plurality of operand values Xi converted into digital signals by the pulse width/digital conversion circuit (9), and an accumulated sum circuit (1) which multiplies each operand value output from the sorting circuit (4) by a corresponding operand value Wi and calculates the accumulated sum of multiplication results. The pulse width/digital conversion circuit (9) includes a counter (10) which counts a clock and outputs a count value as a digital signal, and n trailing edge latch circuits (11-0–11-(n−1)) each of which latches a common count value output from the counter at the trailing edge of the input pulse signal.

REFERENCES:
patent: 4077030 (1978-02-01), Helava
patent: 5165010 (1992-11-01), Masuda et al.
patent: 4-2222 (1992-01-01), None
Kelsuke Korekado, et al.; “A Convolutional Neural Network VLSI for Image Recognition Using Merged/Mixed Analog-Digital Architecture”, 2003; pp. 169-176.
Yasoji Suzuki, et al.; “Introduction to Pulse/Digital Circuit”, Nikkan Kogyo Shimbun, Jul. 26, 2001; pp. 225-232.
U.S Appl. No. 11/055,283, filed on Feb. 10, 2005.
U.S. Appl. No. 11/078,287, filed on Mar. 14, 2005.

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