Static information storage and retrieval – Floating gate – Disturbance control
Reexamination Certificate
2006-06-13
2006-06-13
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Floating gate
Disturbance control
C365S185030, C365S185220, C365S185180, C365S185170
Reexamination Certificate
active
07061798
ABSTRACT:
A non-volatile memory system having an array of memory cells with at least one storage element each is operated with a plurality of storage level ranges per storage element. A flash electrically erasable and programmable read only memory (EEPROM) is an example, wherein the storage elements are electrically floating gates. The memory is operated to minimize the effect of charge coupled between adjacent floating gates, by programming some cells a second time after adjacent cells have been programmed. The second programming step also compacts a distribution of charge levels within at least some of the programming states. This increases the separation between states and/or allows more states to be included within a given storage window. An implementation that is described is for a NAND type of flash EEPROM.
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Chen Jian
Fong Yupin
Quader Khandker N.
Tanaka Tomoharu
Kabushiki Kaisha Toshiba
Parsons Hsue & de Runtz LLP
SanDisk Corporation
Tran Andrew Q.
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