Operating method used in read or verification method of...

Details Operating method used in read or verification method of... Operating method used in read or verification method of...

2011-03-01

2011-03-01

Pham, Ly D (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185170, C365S185180, C365S185200, C365S185220, C365S203000

Reexamination Certificate

active

07898872

ABSTRACT:
In an operating method in a read or verification operation of a nonvolatile memory device, selected bit lines are precharged to a logic high level and, at the same time, unselected bit lines are discharged to a logic low level. The selected and unselected bit lines are connected to respective memory cell strings and, concurrently, word lines are supplied with a pass voltage. The connection between the selected and unselected bit lines and the respective memory cell strings is shut off and, concurrently, a selected word line is supplied with a ground voltage. The selected and unselected bit lines and the respective memory cell strings are coupled together and, concurrently, a selected word line is supplied with a reference voltage and an unselected word line is supplied with the pass voltage.

REFERENCES:
patent: 2008/0198654 (2008-08-01), Toda
patent: 2009/0310405 (2009-12-01), Lee et al.
patent: 1020080090841 (2008-10-01), None
Notice of Allowance issued from Korean Intellectual Property Office on Oct. 22, 2010.

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