1995-07-13
1998-08-04
Eng, David Y.
G06F 930
Patent
active
057908230
ABSTRACT:
A operand prefetching mechanism is described for a system having a cache, in addition to its normal memory. The prefetch apparatus utilizes a table that records the location of each instruction that caused an operand miss and the location of the miss. Associated with this information is the address of each instruction fetch block that contains an instruction that caused an operand miss. The table is called an Operand Prefetch Table. With each instruction block fetched from the cache a search is made of the Operand Prefetch table to determine if the instructions found in this block previously caused operand misses. If the instruction block fetched matches an entry in the Operand Prefetch Table then a prefetch for future operands can be attempted for the instructions contained within the instruction block fetch segment.
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Puzak Thomas Roberts
Stone Harold Stuart
Eng David Y.
International Business Machines - Corporation
Sbrollini Jay P.
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