Operand dependency tracking system and method for a processor th

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395392, G06F 938

Patent

active

057614741

ABSTRACT:
An operand dependency tracking system monitors operand dependencies, among instructions in a processor that executes instruction out of order. The processor has queues that are configured to execute the instructions out of order. An arithmetic queue (aqueue) executes arithmetic instructions and a memory queue (mqueue) executes memory instructions. The aqueue has aslots for receiving respective instructions. Each aslot includes a set dependency latch, a use dependency latch, valid operand (valop) propagation logic, and valid dependent (valdep) logic. The set dependency latch produces a set dependency signal that indicates whether a local instruction in a local slot is to produce operand data that is to be used by a remote dependent instruction that follows the local instruction in program order. The use dependency latch produces a use dependency signal that indicates whether the local instruction is to use operand data that is to be produced by a remote producer instruction that precedes the local instruction in the program order. The valop propagation logic in each local aslot produces a valop signal(s) that is forwarded to the immediately following adjacent aslot to indicate respectively whether or not a valid dependency (producer instruction) precedes the following aslot. The valid dependent logic is configured to prevent the local instruction from launching execution until after the remote producer instruction commences execution, based upon the local use dependency signal and the valid operand signal(s) from the previous slot. In this way, dependencies are set and cleared in a propagation manner, rather than in a broadcast manner.

REFERENCES:
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patent: 5345569 (1994-09-01), Tran
patent: 5416913 (1995-05-01), Grochowski et al.
patent: 5590352 (1996-12-01), Zuraski, Jr. et al.
patent: 5625789 (1997-04-01), Hesson et al.

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