Operand address modification system

Boots – shoes – and leggings

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364DIG1, G06F 1212

Patent

active

053882393

ABSTRACT:
A system of adding an operand address included in an instruction word to the contents of a modification register to obtain an effective address, wherein address data which designates each of a plurality of data tables constituted with prescribed storage capacity, is stored in a plurality of modification registers. Prescribed address data of one of the plurality of modification registers is selected based on the instruction word. The effective address for addressing the operand is obtained by adding the prescribed address data of the one of the plurality of modification registers to address data included in the operand address. The address data included in the operand address designates addresses which correspond to addresses of the plurality of data tables.

REFERENCES:
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patent: 4366536 (1982-12-01), Kohn
patent: 4654789 (1987-03-01), Nusinov et al.
patent: 5134691 (1992-07-01), Elms
Digital Logic and Computer Design, M. Morris Mano, Prentice-Hall, Inc., 1979, pp. 499-523.
Gill, Arthur, Machine and Assembly Language Programming of the POP-II, Chaps. 1-4, Prentice-Hall, Inc., 1983.
"Microcomputer Handbook", published by Ohmsha Co., Ltd., Dec. 25, 1985, pp. 774-775.

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