Open loop receiver

Details Open loop receiver Open loop receiver

1999-09-24

2003-03-11

Trost, William (Department: 2683)

Multiplex communications

Communication over free space

Combining or distributing information via time channels

C370S311000, C370S313000, C370S336000, C370S337000, C370S345000, C455S343200

Reexamination Certificate

active

06532228

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention is applicable to receivers or transmitters for receiving or transmitting respectively a radio packet at a predetermined frequency. The invention particularly relates to power saving arising from the disablement of compensation means arranged to maintain the operating frequency of a transmitter or receiver substantially equal to a predetermined frequency.
Consider a communication system in which radio packets or messages are transmitted in defined time slots to different devices, and the different devices respond in their own separate time slots. In such a situation it may be necessary for a device to switch between receiving/transmitting at one frequency and receiving/transmitting at a different frequency.
It is desirable for this transition to be made quickly. A phase locked loop (PPL) may be used for this purpose. A reference signal is supplied to the PPL which produces at its output a signal with a frequency dependent upon the predetermined value of the reference signal. A transition in the reference signal causes a transition in the output signal. The PPL operates to allow the transition to occur quickly and to prevent variations of the output signal from the predetermined value.
One problem with PPLs is that they consume power. Typically a PPL comprises a voltage controlled oscillator (VCO) the output of which provides the PPL output and which is also fed back as a first input to a phase comparator. The second input to the phase comparator is the reference signal provided from a reference oscillator. The input voltage to the VCO is provided by a capacitor in a loop filter which is charged by a current source and discharged by a current sink. The phase comparator operates either the current source or sink depending upon whether the first input signal to the phase comparator lags or leads the second input to the phase comparator. In this way a feed back loop is established which stabilises the output of the VCO at a desired value, dependent upon the reference signal.
Current sources and sinks draw current and increase power consumption which may be undesirable. In EP-A-0,326,940 a PPL is described. In this PPL the amount of current sourced to or sunk from the capacitor is prevented from exceeding a threshold value by disabling either the current source or the current sink if the threshold is exceeded.
In EP-A-0,565,127 a system is described in which a primary transceiver and a mobile transceiver are communicating in a particular frequency channel f
1
using time slots. In the mobile transceiver a transmitter and receiver are alternately turned on in respective receive and transmit slots. In a standby mode the transmitter is permanently turned off and the receiver is turned on in the receive slots. During the transmit slots the phase locked loop is opened preventing the capacitor in the loop filter from being charged or discharged via the phase detector. Power is saved by disabling at least the phase detector. The capacitor therefore stores energy and allows the PPL to operate at high speeds. In the talking mode the receiver is further turned on in an idle slot so that the mobile transceiver can search a different frequency channel f
2
to determine if hand off to a different primary transceiver is required. The document is particular concerned with the problems of quickly switching the receiver from listening to channel f
2
during an idle slot to listening to channel f
1
in open loop in the immediately following receive slot. The PPL in the receiver, using a first loop filter, is turned on prior to the beginning of the idle slot and controls the receiver to receive on channel f
2
. The PPL is then adjusted towards the end of the idle slot to switch from using the first loop filter to using a second loop filter so that the receiver receives on channel f
1
. The PPL is then made open loop prior to the start of the receive slot which follows the idle slot.
Such a system relies on there being very good synchronisation between the time frame used in the mobile transceiver and the time frame used in the primary transceiver. However, synchronisation may be lost. For example, the primary transceiver may in some circumstances change its frame timing so that it can synchronise with another network. In this instance the mobile transceiver would loose its synchronisation with the primary transceiver or sophisticated techniques would be required to maintain synchronisation. This may result in the PPL being in open loop for too long. If a PPL is left in open loop for too long the capacitor may discharge via leakage currents causing a drift in the output frequency of the VCO. This in turn may cause bit errors in transmitted or received signals.
It would be desirable to provide an improved technique by which receivers could conserve power.
SUMMARY OF THE INVENTION
According to the present invention there is provided a receiver for receiving a radio packet transmitted at a transmission frequency, comprising: reception means arranged to receive radio signals at a receiving frequency, comprising compensation means arranged to maintain the receiving frequency substantially equal to said transmission frequency; detection means arranged to detect within the received radio signals a pre-defined sequence identifying the beginning of a radio packet; and disabling means responsive to said detection means, arranged to disable said compensation means after the receipt of the sequence of radio signals identifying the beginning of a radio packet
The receiver therefore enters a low power mode after it has received the sequence identifying the beginning of a radio packet. In one embodiment the receiver has a PPL which is closed at the start of each receiving time slot but opens after a short time and then closes at the end of each time slot.


REFERENCES:
patent: 4631496 (1986-12-01), Borras et al.
patent: 5475877 (1995-12-01), Adachi
patent: 5594735 (1997-01-01), Jokura
patent: 5613235 (1997-03-01), Kivari et al.
patent: 6049532 (2000-04-01), Steele et al.
patent: 0 326 940 (1989-08-01), None
patent: 0 565 127 (1993-10-01), None
patent: 0 594 403 (1994-04-01), None
patent: 9702676 (1997-01-01), None

Affiliated with

Also associated with

Rating

Open loop receiver does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Open loop receiver, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Open loop receiver will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3039920