Open-loop current amplifiers having improved gain characteristic

Details Open-loop current amplifiers having improved gain characteristic Open-loop current amplifiers having improved gain characteristic

1988-12-13

1989-12-26

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including differential amplifier

H03F 345

Patent

active

048900680

ABSTRACT:
An amplifier includes a first pair of FETS arranged in a differential amplifier configuration having their drain-source paths connected between a first constant current source and a point of operating potential. A second pair of FETS has gate electrodes coupled together for receiving an input signal, source electrodes coupled together to a second constant current source, and drain electrodes connected to sources of third and fourth FETS, respectively. The gate electrodes of the fourth FET and the first FET in the first pair are connected to the sources of the third and fourth FETS, respectively, the latter connection forming an output junction. A third pair of FETS has gate electrodes coupled together for receiving the input signal, source electrodes coupled together to the source electrodes of the second pair to form another differential amplifier configuration, and drain electrodes coupled to the source electrodes of fifth and sixth FETs, respectively. The sixth FET has its source electrode coupled to the gate electrode of the second FET in the first pair, and its gate electrode coupled to the source electrode of the fifth FET. The drain electrodes of the third, fourth, fifth and sixth FETS are coupled to the point of operating potential. The gate electrodes of the third and fifth FETS are coupled to a point of reference potential. Upon receipt of the input signal, the amplifier provides a high gain output signal at the output junction.

REFERENCES:
Tsividis et al, "A Process Insensitive NMOS Operational Amplifier", Digest of Technical Papers, 1979 IEEE International Solid-State Circuits Conference, Feb. 15, 1979, pp. 188-189.
Article by David C. Soo et al.: IEEE Journal of Solid-State Circuits, vol. SC-17, No. 6, Dec. 1982; pp. 1174-1178.
Article by Barrie Gilbert; IEEE Journal of Solid-State Circuits, vol. SC-3, No. 4, Dec. 1968; pp. 353-365.

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