OP-AMP CONFIGURABLE IN A NON-INVERTING MODE WITH A CLOSED...

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

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Details

C330S069000

Reexamination Certificate

active

06937099

ABSTRACT:
A circuit (1) comprising eight DACs (2ato2h), the analog outputs of which are applied to the non-inverting inputs (6) of corresponding op-amps (7ato7h) for gaining up the analog output voltage from the corresponding DAC (2). The op-amps (7) are identical, and are configured in a non-inverting mode with a closed loop gain of two provided by first and second resistors (R1) and (R2). Primary outputs (8) of the op-amps (7) are coupled to output pins (9ato9h) of the circuit (1). The second resistors (R2) couple primary inverting inputs (12) of the op-amps (7) to a common lo voltage reference rail (14), which is coupled to a true ground reference pin (15) through a coupling wire (16)which exhibit a combined inherent resistance (Rp). The voltage reference on the common voltage reference rail (14) varies with time as the output signals of the pa-amps (7) vary, and would thus result in cross-talk between the DACs (2ato2h). Each op-amp (7) comprises a secondary differential input amplifier stage (36), the non-inverting and inverting inputs (37,38) of which are coupled to the common voltage reference rail (14) and the ground reference pin (15), respectively. The secondary differential input stage (36) provides a secondary current to a node (29) in the op-amp (7) in response to variation in the time varying voltage reference for summing with an intermediate current provided through the node (29) by a primary differential input amplifier stage (25) of the op-amp (7) for correcting the output voltage signal on the primary output (8) for variation in the voltage reference on the common voltage reference rail (14).

REFERENCES:
patent: 4162456 (1979-07-01), Lukes
patent: 4263561 (1981-04-01), Weber
patent: 5155450 (1992-10-01), Schultz
patent: 5510751 (1996-04-01), Nauta
patent: 6091294 (2000-07-01), Shirai et al.
patent: 6175254 (2001-01-01), Corio
patent: 0744829 (1996-11-01), None
patent: 0809353 (1997-11-01), None
PCT/IE2004/000153 international search report.

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