Ones density monitor

Details Ones density monitor Ones density monitor

1995-09-29

1997-10-28

Safourek, Benedict V.

Pulse or digital communications

Testing

36471509, 371 55, G06F 702

Patent

active

056824050

ABSTRACT:
A ones bit density monitor is disclosed which is comprised of a 31-bit shift register, a counter, and a clock circuit having logic to preclude the number representing a number of pulses within the shift register from changing whenever a pulse is simultaneously input and output from the 31-bit shift register. To accomplish this, the counter increments every time a pulse is input to the 31-bit shift register and is decremented every time a pulse is output from the 31-bit shift register. Once the count reaches the number four, the ones density monitor circuit, and more specifically the counter, outputs a signal reflecting that a carrier is back on line.

REFERENCES:
patent: 4486848 (1984-12-01), Kaminski
patent: 4631695 (1986-12-01), Kozlik
patent: 5528526 (1996-06-01), Klug et al.

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