One-transistor static random access memory with integrated...

Details One-transistor static random access memory with integrated... One-transistor static random access memory with integrated...

2007-10-29

2011-10-11

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

Combined with field effect transistor

C257S330000, C257SE27098, C257SE29211

Reexamination Certificate

active

08035126

ABSTRACT:
A one-transistor static random access memory (1T SRAM) device and circuit implementations are disclosed. The 1T SRAM device includes a planar field effect transistor (FET) on the surface of the cell and a vertical PNPN device integrated to one side of the FET. A base of the PNP of the PNPN device is electrically common to the emitter/collector of the FET and a base of the NPN of the PNPN device is electrically common to the channel region of the FET. The anode pin of the PNPN device may be used as a word line or a bit line. A method of forming the 1T SRAM device is also disclosed.

REFERENCES:
patent: 3918033 (1975-11-01), Case et al.
patent: 4090254 (1978-05-01), Ho et al.
patent: 5276638 (1994-01-01), Wong
patent: 5324966 (1994-06-01), Muraoka et al.
patent: 5844259 (1998-12-01), Kinzer et al.
patent: 5959821 (1999-09-01), Voogel
patent: 5982016 (1999-11-01), Pezzani et al.
patent: 6229161 (2001-05-01), Nemati et al.
patent: 6528356 (2003-03-01), Nemati et al.
patent: 6545297 (2003-04-01), Noble, Jr. et al.
patent: 6713791 (2004-03-01), Hsu et al.
patent: 6822294 (2004-11-01), Vashchenko et al.
patent: 7053423 (2006-05-01), Nemati et al.
patent: 2002/0096690 (2002-07-01), Nemati et al.
patent: 2004/0041212 (2004-03-01), Bhattacharyya
patent: 2004/0121533 (2004-06-01), Huang et al.
patent: 2004/0262635 (2004-12-01), Lee
patent: 2005/0001232 (2005-01-01), Bhattacharyya
patent: 2006/0102978 (2006-05-01), Schuler et al.
patent: 2007/0096203 (2007-05-01), Mouli
Shulman, “A Static . . . Devices”, Jun. 1994.
Nguyen et al., “One-Transistor Static Random Access Memory With Integrated Vertical PNPN Device”, U.S. Appl. No. 11/427,406, filed Jun. 29, 2006.
“Static Random Access Memory”, Wikipedia, http://en.wikipedia.org/wiki/Static—random—access—memory, Apr. 12, 2006, pp. 1-4.
Fairchild's Process Enhancements Eliminate the CMOS SCR Latch-Up Problem in 74 HC Logic, Fairchild Semiconductor Corporation, Application Note 339, Nov. 1987, pp. 1-9.
Nemati et al,. “A Novel High Density, Low Voltage SRAM Cell With a Vertical NDR Device”, Center for Integrated Systems, Stanford University, Stanford, California, 1 p.
U.S. Appl. No. 11/427,406, Office Action, dated Jun. 1, 2009.
U.S. Appl. No. 11/926,399, Amendment to May 4, 2009 Office Action, filed Jul. 29, 2009.
U.S. Appl. No. 11/926,399, Office Action dated May 4, 2009.
Shulman, Dima D., “A Static Memory Cell Based on the Negative Resistance of the Gate Terminal of p-n-p-n Devices”, IEEE Journal of Solid-State Circuits, vol. 29, No. 6, Jun. 1994, pp. 733-736.
U.S. Appl. No. 11/427,406, filed Jun. 29, 2006, Office Action dated Dec. 29, 2009.
U.S. Appl. No. 11/427,406, filed Jun. 29, 2006, Notice of Allowance and Fees Due dated Apr. 19, 2010.
U.S. Appl. No. 11/427,406, filed Jun. 29, 2006, Office Action dated Dec. 18, 2007.
U.S. Appl. No. 11/427,406, filed Jun. 29, 2006, Final Office Action dated Jun. 27, 2008.

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