One-time programmable memory cell

Details One-time programmable memory cell One-time programmable memory cell

2008-03-21

2011-10-04

Pizarro Crespo, Marcos D (Department: 2814)

Static information storage and retrieval

Read only systems

Fusible

C257S530000, C257S209000

Reexamination Certificate

active

08031506

ABSTRACT:
A disclosed embodiment is a programmable memory cell having improved IV characteristics comprising a thick oxide spacer transistor interposed between a programmable thin oxide antifuse and a thick oxide access transistor. The spacer transistor separates a rupture site formed during programming the programmable antifuse from the access transistor, so as to result in the improved IV characteristics. The programmable antifuse is proximate to one side of the spacer transistor, while the access transistor is proximate to an opposite side of the spacer transistor. The source region of the access transistor is coupled to ground, and the drain region of the access transistor also serves as the source region of the spacer transistor. The access transistor is coupled to a row line, while the spacer transistor and the programmable antifuse are coupled to a column line. The rupture site is formed during programming by applying a programming voltage to the programmable antifuse.

REFERENCES:
patent: 5646438 (1997-07-01), Frerichs
patent: 2006/0291267 (2006-12-01), Jenne et al.
patent: 2008/0211060 (2008-09-01), Chang et al.

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