One time programmable memory and method of operation

Details One time programmable memory and method of operation One time programmable memory and method of operation

2007-04-17

2007-04-17

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read only systems

C365S185030, C365S185260

Reexamination Certificate

active

11197814

ABSTRACT:
A one time programmable (OTP) memory has two-bit cells for increasing density. Each cell has two select transistors and a programmable transistor in series between the two select transistors. The programmable transistor has two independent storage locations. One is between the gate and a first source/drain region and the second is between the gate and a second source/drain region. The storage locations are portions of the gate dielectric where the sources or drains overlap the gate and are independently programmed by selectively passing a programming current through them. The programming current is of sufficient magnitude and duration to permanently reduce the impedance by more than three orders of magnitude of the storage locations to be programmed. The programming current is limited in magnitude to avoid damage to other circuit elements and is preferably induced at least in part by applying a negative voltage to the gate of the programming transistor.

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U.S. Appl. No. 10/891,649, filed Jul. 15, 2004.

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