One-pin shift register interface

Details One-pin shift register interface One-pin shift register interface

1997-02-13

1999-03-09

Wambach, Margaret Rose

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Particular input circuit

372 26, 372 54, G11C 1900

Patent

active

058811214

ABSTRACT:
A register using a single pin to provide two or more control signals (e.g., clock and data signals). The present invention decodes a three state input waveform to generate a clock/write signal and uses a three state clock waveform to generate a clock/read data signal. The present invention generally comprises a three-level receiver, a latch and an output driver to form a one-pin bidirectional interface used with a shift register. To write, the interface converts a three-level input signal into separate clock and data signals which drive the shift register. To read, the interface converts a bi-level input signal into a three-level output signal representing the output of the shift register. As a result, the present invention allows the programming of a device such as an erasable programmable read only memory (EPROM) in a clock chip while utilizing the fewest number of pins.

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patent: 5483566 (1996-01-01), O'Hara, Jr. et al.
Dallas Semiconductor Silicon Serial No. DS2401, Aug. 30, 1995, pp. 1-9.
Dallas Semiconductor Application Note 74 Reading and Writing Touch Memories via Serial Interfaces, Mar. 24, 1995, pp. 1-40.

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