One mask solution for the integration of the thin film resistor

Etching a substrate: processes – Forming or treating electrical conductor article – Forming or treating resistive material

Reexamination Certificate

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Details

C216S018000, C216S038000, C216S039000, C216S088000, C216S100000, C438S692000, C438S745000, C438S754000

Reexamination Certificate

active

06497824

ABSTRACT:

FIELD OF THE INVENTION
The invention is generally related to the field of thin film resistors in integrated circuits and more specifically to a one mask solution for integrating a thin film resistor into an interconnect process flow.
BACKGROUND OF THE INVENTION
Thin film resistors are utilized in electronic circuits in many important technological applications. The resistors may be part of an individual device, or may be part of a complex hybrid circuit or integrated circuit. Some specific examples of thin film resistors in integrated circuits are the resistive ladder network in an analog to-digital converter, and current limiting and load resistors in emitter follower amplifiers.
Film resistors can comprise a variety of materials including tantalum nitride (TaN), silicon chromium (SiCr), and nickel chromium (NiCr). These resistor materials are generally evaporated or sputtered onto a substrate wafer at a metal interconnect level and subsequently patterned and etched. The thin film resistors require an electrical connection to be made to them. Thus, two mask layers are required. One, TFRES, is to form the resistor itself and the other, TFHEAD, is used to form the resistor “heads” or contact points of the resistor. Connection is made from an overlying metal interconnect layer to the resistor heads. The resistor heads are required to protect the resistor during the via etch needed to make contact between the overlying metal interconnect layer and the resistor. In addition to two masks, multiple deposition and dry/wet etch steps are required to incorporate the resistor.
Morris (U.S. Pat. No. 5,485,138, issued Jan. 16, 1996) describes a method of forming an inverted thin film resistor. The resistor structure is deposited directly on top of the metallic interconnects. The metallic interconnects are formed. An interlevel dielectric layer is deposited over the metallic interconnects and polished back to expose the top surface of the metallic interconnects. The resistor is then formed on a portion of the interlevel dielectric and a portion of the metallic interconnect.
SUMMARY OF THE INVENTION
The invention is a method for integrating a thin film resistor into an interconnect process flow. Metal interconnect lines are formed over a semiconductor body. An interlevel dielectric is then formed over the metal interconnect lines. Conductively filled vias are then formed through the interlevel dielectric to the metal interconnect lines. A thin film resistor is then formed connecting between at least two of the conductively filled vias using a single mask step. Connection to the resistor is from below using a via process sequence already required for connecting between interconnect layer. Thus, only one additional mask step is required to incorporate the resistor.
This and other advantages will be apparent to those of ordinary skill in the art having reference to the specification in conjunction with the drawings.


REFERENCES:
patent: 5338702 (1994-08-01), Kobeda et al.
patent: 5972788 (1999-10-01), Ryan et al.
patent: 6221786 (2001-04-01), Hsu et al.

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