One mask Pt/PCMO/Pt stack etching process for RRAM applications

Semiconductor device manufacturing: process – Having selenium or tellurium elemental semiconductor component

Reexamination Certificate

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C438S734000, C438S381000, C438S382000, C438S781000, C438S782000, C257SE21490

Reexamination Certificate

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10883228

ABSTRACT:
A one-mask etching method for use with a PCMO-containing RRAM to reduce stack side-wall residuals, includes preparing a substrate, taken from the group of substrates consisting of silicon, silicon dioxide and polysilicon; depositing a bottom electrode on the substrate; depositing a PCMO layer on the bottom electrode; depositing a top electrode on the PCMO layer; depositing a hard mask on the top electrode; depositing and patterning a photoresist layer on the hard mask; etching the hard mask; etching the top electrode using a first etching process having an etching atmosphere consisting of Ar, O2, and Cl2; etching the PCMO layer using an etching process taken from the group of etching processes consisting of the first etching process and a second etching process having an etching atmosphere consisting of Ar and O2. etching the bottom electrode using the first etching process; and completing the RRAM device.

REFERENCES:
patent: 6774004 (2004-08-01), Hsu et al.
patent: 6774054 (2004-08-01), Zhang et al.
patent: 2005/0079727 (2005-04-01), Zhang et al.

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